Show patches with: Series = RISC-V/rvv: Update rvv from v01.0 to v1.0       |    State = Action Required       |    Archived = No       |   4 patches
Patch Series S/W/F Date Submitter Delegate State
[integration,v2,4/4] RISC-V/rvv: Added zve* and zvl* extensions, and clarify the imply rules. RISC-V/rvv: Update rvv from v01.0 to v1.0 0 0 0 2021-10-05 Nelson Chu New
[integration,v2,3/4] RISC-V/rvv: Separate zvamo from v, and removed the zvlsseg extension name. RISC-V/rvv: Update rvv from v01.0 to v1.0 0 0 0 2021-10-05 Nelson Chu New
[integration,v2,2/4] RISC-V/rvv: Update constraints for widening and narrowing instructions. RISC-V/rvv: Update rvv from v01.0 to v1.0 0 0 0 2021-10-05 Nelson Chu New
[integration,v2,1/4] RISC-V/rvv: Added assembly pseudo and changed assembler mnemonics. RISC-V/rvv: Update rvv from v01.0 to v1.0 0 0 0 2021-10-05 Nelson Chu New