Show patches with: Series = RISC-V: Add vendor(T-HEAD) opcodes       |    State = Action Required       |   2 patches
Patch Series S/W/F Date Submitter Delegate State
[Integration,2/2] RISC-V: Update csr and opcodes for Xuantie CPUs. RISC-V: Add vendor(T-HEAD) opcodes 0 0 0 2021-09-03 =?UTF-8?B?5aSP56uL5pa5?= New
[Integration,1/2] RISC-V: add vendor opcodes RISC-V: Add vendor(T-HEAD) opcodes 0 0 0 2021-09-03 =?UTF-8?B?5aSP56uL5pa5?= New