[i386] Fix ICE of unrecognizable insn. [PR target/104001]

Message ID 20220113155918.28175-1-hongtao.liu@intel.com
State New
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Series
  • [i386] Fix ICE of unrecognizable insn. [PR target/104001]
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Commit Message

Richard Biener via Gcc-patches Jan. 13, 2022, 3:59 p.m.
For define_insn_and_split "*xor2andn":

1. Refine predicate of operands[0] from nonimmediate_operand to
register_operand.
2. Remove TARGET_AVX512BW from condition to avoid kmov when TARGET_BMI
is not available.
3. Force_reg operands[2].

Bootstrapped and regtested on x86_64-pc-linux-gnu{-m32,}.
Ok for trunk?

gcc/ChangeLog:

	PR target/104001
	PR target/94790
	* config/i386/i386.md (*xor2andn): Refine predicate of
	operands[0] from nonimmediate_operand to
	register_operand, remove TARGET_AVX512BW from condition,
	force_reg operands[2].

gcc/testsuite/ChangeLog:

	* gcc.target/i386/pr104001.c: New test.
---
 gcc/config/i386/i386.md                  |  6 +++---
 gcc/testsuite/gcc.target/i386/pr104001.c | 21 +++++++++++++++++++++
 2 files changed, 24 insertions(+), 3 deletions(-)
 create mode 100644 gcc/testsuite/gcc.target/i386/pr104001.c

-- 
2.18.1

Comments

Richard Biener via Gcc-patches Jan. 14, 2022, 5:09 a.m. | #1
Here's the patch I'm going to check in, the patch is pre-approved in PR.

On Thu, Jan 13, 2022 at 11:59 PM liuhongt <hongtao.liu@intel.com> wrote:
>

> For define_insn_and_split "*xor2andn":

>

> 1. Refine predicate of operands[0] from nonimmediate_operand to

> register_operand.

> 2. Remove TARGET_AVX512BW from condition to avoid kmov when TARGET_BMI

> is not available.

> 3. Force_reg operands[2].

>

> Bootstrapped and regtested on x86_64-pc-linux-gnu{-m32,}.

> Ok for trunk?

>

> gcc/ChangeLog:

>

>         PR target/104001

>         PR target/94790

>         * config/i386/i386.md (*xor2andn): Refine predicate of

>         operands[0] from nonimmediate_operand to

>         register_operand, remove TARGET_AVX512BW from condition,

>         force_reg operands[2].

>

> gcc/testsuite/ChangeLog:

>

>         * gcc.target/i386/pr104001.c: New test.

> ---

>  gcc/config/i386/i386.md                  |  6 +++---

>  gcc/testsuite/gcc.target/i386/pr104001.c | 21 +++++++++++++++++++++

>  2 files changed, 24 insertions(+), 3 deletions(-)

>  create mode 100644 gcc/testsuite/gcc.target/i386/pr104001.c

>

> diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md

> index 9937643a273..7bd4f24aa07 100644

> --- a/gcc/config/i386/i386.md

> +++ b/gcc/config/i386/i386.md

> @@ -10455,7 +10455,7 @@ (define_insn_and_split "*xordi_1_btc"

>

>  ;; PR target/94790: Optimize a ^ ((a ^ b) & mask) to (~mask & a) | (b & mask)

>  (define_insn_and_split "*xor2andn"

> -  [(set (match_operand:SWI248 0 "nonimmediate_operand")

> +  [(set (match_operand:SWI248 0 "register_operand")

>         (xor:SWI248

>           (and:SWI248

>             (xor:SWI248

> @@ -10464,8 +10464,7 @@ (define_insn_and_split "*xor2andn"

>             (match_operand:SWI248 3 "nonimmediate_operand"))

>           (match_dup 1)))

>      (clobber (reg:CC FLAGS_REG))]

> -  "(TARGET_BMI || TARGET_AVX512BW)

> -   && ix86_pre_reload_split ()"

> +  "TARGET_BMI && ix86_pre_reload_split ()"

>    "#"

>    "&& 1"

>    [(parallel [(set (match_dup 4)

> @@ -10486,6 +10485,7 @@ (define_insn_and_split "*xor2andn"

>               (clobber (reg:CC FLAGS_REG))])]

>  {

>    operands[1] = force_reg (<MODE>mode, operands[1]);

> +  operands[2] = force_reg (<MODE>mode, operands[2]);

>    operands[3] = force_reg (<MODE>mode, operands[3]);

>    operands[4] = gen_reg_rtx (<MODE>mode);

>    operands[5] = gen_reg_rtx (<MODE>mode);

> diff --git a/gcc/testsuite/gcc.target/i386/pr104001.c b/gcc/testsuite/gcc.target/i386/pr104001.c

> new file mode 100644

> index 00000000000..bd85aa7145e

> --- /dev/null

> +++ b/gcc/testsuite/gcc.target/i386/pr104001.c

> @@ -0,0 +1,21 @@

> +/* { dg-do compile } */

> +/* { dg-options "-O2" } */

> +/* { dg-final { scan-assembler-not "kandn" } } */

> +/* { dg-final { scan-assembler-times "andn" 1 } } */

> +

> +int b, c, d;

> +int r;

> +

> +void

> +__attribute__((target("bmi")))

> +foo ()

> +{

> +  r = ((b & ~d) | (c & d));

> +}

> +

> +void

> +__attribute__((target("avx512bw")))

> +bar ()

> +{

> +  r = ((b & ~d) | (c & d));

> +}

> --

> 2.18.1

>



-- 
BR,
Hongtao
From 04ef9a899217f334f729a75a1907b505c4c29451 Mon Sep 17 00:00:00 2001
From: liuhongt <hongtao.liu@intel.com>
Date: Thu, 13 Jan 2022 22:51:49 +0800
Subject: [PATCH] [i386] Fix ICE of unrecognizable insn. [PR target/104001]

For define_insn_and_split "*xor2andn":

1. Refine predicate of operands[0] from nonimmediate_operand to
register_operand.
2. Remove TARGET_AVX512BW from condition to avoid kmov when TARGET_BMI
is not available.

gcc/ChangeLog:

	PR target/104001
	PR target/94790
	PR target/104014
	* config/i386/i386.md (*xor2andn): Refine predicate of
	operands[0] from nonimmediate_operand to
	register_operand, remove TARGET_AVX512BW from condition.

gcc/testsuite/ChangeLog:

	* gcc.target/i386/pr104001.c: New test.
---
 gcc/config/i386/i386.md                  | 11 +++++------
 gcc/testsuite/gcc.target/i386/pr104001.c | 21 +++++++++++++++++++++
 2 files changed, 26 insertions(+), 6 deletions(-)
 create mode 100644 gcc/testsuite/gcc.target/i386/pr104001.c

diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index 9937643a273..a631630add6 100644
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -10453,9 +10453,9 @@ (define_insn_and_split "*xordi_1_btc"
    (set_attr "znver1_decode" "double")
    (set_attr "mode" "DI")])
 
-;; PR target/94790: Optimize a ^ ((a ^ b) & mask) to (~mask & a) | (b & mask)
+;; Optimize a ^ ((a ^ b) & mask) to (~mask & a) | (b & mask)
 (define_insn_and_split "*xor2andn"
-  [(set (match_operand:SWI248 0 "nonimmediate_operand")
+  [(set (match_operand:SWI248 0 "register_operand")
 	(xor:SWI248
 	  (and:SWI248
 	    (xor:SWI248
@@ -10464,8 +10464,7 @@ (define_insn_and_split "*xor2andn"
 	    (match_operand:SWI248 3 "nonimmediate_operand"))
 	  (match_dup 1)))
     (clobber (reg:CC FLAGS_REG))]
-  "(TARGET_BMI || TARGET_AVX512BW)
-   && ix86_pre_reload_split ()"
+  "TARGET_BMI && ix86_pre_reload_split ()"
   "#"
   "&& 1"
   [(parallel [(set (match_dup 4)
@@ -10476,8 +10475,8 @@ (define_insn_and_split "*xor2andn"
 	      (clobber (reg:CC FLAGS_REG))])
    (parallel [(set (match_dup 5)
 		(and:SWI248
-		  (match_dup 2)
-		  (match_dup 3)))
+		  (match_dup 3)
+		  (match_dup 2)))
 	      (clobber (reg:CC FLAGS_REG))])
    (parallel [(set (match_dup 0)
 		(ior:SWI248
diff --git a/gcc/testsuite/gcc.target/i386/pr104001.c b/gcc/testsuite/gcc.target/i386/pr104001.c
new file mode 100644
index 00000000000..bd85aa7145e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr104001.c
@@ -0,0 +1,21 @@
+/* { dg-do compile } */
+/* { dg-options "-O2" } */
+/* { dg-final { scan-assembler-not "kandn" } } */
+/* { dg-final { scan-assembler-times "andn" 1 } } */
+
+int b, c, d;
+int r;
+
+void
+__attribute__((target("bmi")))
+foo ()
+{
+  r = ((b & ~d) | (c & d));
+}
+
+void
+__attribute__((target("avx512bw")))
+bar ()
+{
+  r = ((b & ~d) | (c & d));
+}

Patch

diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index 9937643a273..7bd4f24aa07 100644
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -10455,7 +10455,7 @@  (define_insn_and_split "*xordi_1_btc"
 
 ;; PR target/94790: Optimize a ^ ((a ^ b) & mask) to (~mask & a) | (b & mask)
 (define_insn_and_split "*xor2andn"
-  [(set (match_operand:SWI248 0 "nonimmediate_operand")
+  [(set (match_operand:SWI248 0 "register_operand")
 	(xor:SWI248
 	  (and:SWI248
 	    (xor:SWI248
@@ -10464,8 +10464,7 @@  (define_insn_and_split "*xor2andn"
 	    (match_operand:SWI248 3 "nonimmediate_operand"))
 	  (match_dup 1)))
     (clobber (reg:CC FLAGS_REG))]
-  "(TARGET_BMI || TARGET_AVX512BW)
-   && ix86_pre_reload_split ()"
+  "TARGET_BMI && ix86_pre_reload_split ()"
   "#"
   "&& 1"
   [(parallel [(set (match_dup 4)
@@ -10486,6 +10485,7 @@  (define_insn_and_split "*xor2andn"
 	      (clobber (reg:CC FLAGS_REG))])]
 {
   operands[1] = force_reg (<MODE>mode, operands[1]);
+  operands[2] = force_reg (<MODE>mode, operands[2]);
   operands[3] = force_reg (<MODE>mode, operands[3]);
   operands[4] = gen_reg_rtx (<MODE>mode);
   operands[5] = gen_reg_rtx (<MODE>mode);
diff --git a/gcc/testsuite/gcc.target/i386/pr104001.c b/gcc/testsuite/gcc.target/i386/pr104001.c
new file mode 100644
index 00000000000..bd85aa7145e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr104001.c
@@ -0,0 +1,21 @@ 
+/* { dg-do compile } */
+/* { dg-options "-O2" } */
+/* { dg-final { scan-assembler-not "kandn" } } */
+/* { dg-final { scan-assembler-times "andn" 1 } } */
+
+int b, c, d;
+int r;
+
+void
+__attribute__((target("bmi")))
+foo ()
+{
+  r = ((b & ~d) | (c & d));
+}
+
+void
+__attribute__((target("avx512bw")))
+bar ()
+{
+  r = ((b & ~d) | (c & d));
+}