powerpc: Fix unrecognized instruction errors with recent GCC

Message ID 20210914181958.749314-1-pc@us.ibm.com
State New
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Series
  • powerpc: Fix unrecognized instruction errors with recent GCC
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Commit Message

naohirot--- via Libc-alpha Sept. 14, 2021, 6:19 p.m.
Recent versions of GCC stopped passing "-many" to the assembler,
so some instructions which were under older, more stringent
"machine" directives no longer compile with unrecognized instructions
in that context.

In tst-ucontext-ppc64-vscr.c, while the instructions provoking the new
error messages are bracketed by ".machine power5", which is ostensibly
Power ISA 2.03 (POWER5), the POWER5 processor did not support the
VSX subset, so these instructions are not recognized as "power5".

Error: unrecognized opcode: `vspltisb'
Error: unrecognized opcode: `vpkuwus'
Error: unrecognized opcode: `mfvscr'
Error: unrecognized opcode: `stvx'

Manually adding the VSX subset via ".machine altivec" is sufficient.
---
 sysdeps/powerpc/powerpc64/tst-ucontext-ppc64-vscr.c | 1 +
 1 file changed, 1 insertion(+)

-- 
2.27.0

Comments

naohirot--- via Libc-alpha Sept. 20, 2021, 12:56 p.m. | #1
"Paul A. Clarke via Libc-alpha" <libc-alpha@sourceware.org> writes:

> Recent versions of GCC stopped passing "-many" to the assembler,

> so some instructions which were under older, more stringent

> "machine" directives no longer compile with unrecognized instructions

> in that context.


I think the most recent change causing this is binutils commit:
https://sourceware.org/git/?p=binutils-gdb.git;a=commitdiff;h=b25f942e18d6ecd7ec3e2d2e9930eb4f996c258a

It's worth mentioning it in the commit message too.

LGTM with this inclusion in the commit message.

Reviewed-by: Tulio Magno Quites Machado Filho <tuliom@linux.ibm.com>


-- 
Tulio Magno

Patch

diff --git a/sysdeps/powerpc/powerpc64/tst-ucontext-ppc64-vscr.c b/sysdeps/powerpc/powerpc64/tst-ucontext-ppc64-vscr.c
index 28c87fcef72b..d3fc4ab589f4 100644
--- a/sysdeps/powerpc/powerpc64/tst-ucontext-ppc64-vscr.c
+++ b/sysdeps/powerpc/powerpc64/tst-ucontext-ppc64-vscr.c
@@ -50,6 +50,7 @@  do_test (void)
   /* Set SAT bit in VSCR register.  */
   asm volatile (".machine push;\n"
 		".machine \"power5\";\n"
+		".machine altivec;\n"
 		"vspltisb %0,0;\n"
 		"vspltisb %1,-1;\n"
 		"vpkuwus %0,%0,%1;\n"