[2/3] bpf testsuite: add tests for new feature options

Message ID 20210909213645.11605-3-david.faust@oracle.com
State New
Headers show
Series
  • bpf: add -mcpu and related feature options
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Commit Message

Richard Biener via Gcc-patches Sept. 9, 2021, 9:36 p.m.
This commit adds tests for the new -mjmpext, -mjmp32 and -malu32 feature
options in the BPF backend.

gcc/testsuite/ChangeLog:
	* gcc.target/bpf/alu-1.c: New test.
	* gcc.target/bpf/jmp-1.c: New test.
---
 gcc/testsuite/gcc.target/bpf/alu-1.c | 56 +++++++++++++++++++++++++++
 gcc/testsuite/gcc.target/bpf/jmp-1.c | 57 ++++++++++++++++++++++++++++
 2 files changed, 113 insertions(+)
 create mode 100644 gcc/testsuite/gcc.target/bpf/alu-1.c
 create mode 100644 gcc/testsuite/gcc.target/bpf/jmp-1.c

-- 
2.33.0

Patch

diff --git a/gcc/testsuite/gcc.target/bpf/alu-1.c b/gcc/testsuite/gcc.target/bpf/alu-1.c
new file mode 100644
index 00000000000..98149305e82
--- /dev/null
+++ b/gcc/testsuite/gcc.target/bpf/alu-1.c
@@ -0,0 +1,56 @@ 
+/* Ensure 32-bit ALU instructions are not generated if -malu32 is
+   not enabled.  */
+
+/* { dg-do compile } */
+/* { dg-options "-mno-alu32" } */
+
+int foo (int a, int b)
+{
+  a += 1;
+  b += a;
+  b -= 5;
+  a -= a;
+
+  a *= 2;
+  b *= a;
+
+  a |= 0xfafa;
+  b |= a;
+  b &= 0x00ffff00;
+  b &= a;
+
+  a <<= 2;
+  b <<= a;
+  b >>= 5;
+  a >>= b;
+
+  int c = a;
+  int d = 5;
+
+  d ^= a;
+  c ^= 0xe5e5e5e5;
+  c = -c;
+
+  unsigned int x = a;
+  unsigned int y = b;
+  x /= 3;
+  y /= x;
+  x %= 4;
+  y %= x;
+
+  return a + b - c + d - x + y;
+}
+
+/* { dg-final { scan-assembler-times "mov32\t0" 0 } } */
+/* { dg-final { scan-assembler-times "add32\t0" 0 } } */
+/* { dg-final { scan-assembler-times "sub32\t0" 0 } } */
+/* { dg-final { scan-assembler-times "mul32\t0" 0 } } */
+/* { dg-final { scan-assembler-times "div32\t0" 0 } } */
+/* { dg-final { scan-assembler-times "mod32\t0" 0 } } */
+/* { dg-final { scan-assembler-times "neg32\t0" 0 } } */
+/* { dg-final { scan-assembler-times "and32\t0" 0 } } */
+/* { dg-final { scan-assembler-times "or32\t0" 0 } } */
+/* { dg-final { scan-assembler-times "xor32\t0" 0 } } */
+/* { dg-final { scan-assembler-times "rsh32\t0" 0 } } */
+/* { dg-final { scan-assembler-times "lsh32\t0" 0 } } */
+/* { dg-final { scan-assembler-times "arsh32\t0" 0 } } */
diff --git a/gcc/testsuite/gcc.target/bpf/jmp-1.c b/gcc/testsuite/gcc.target/bpf/jmp-1.c
new file mode 100644
index 00000000000..eaf825395ef
--- /dev/null
+++ b/gcc/testsuite/gcc.target/bpf/jmp-1.c
@@ -0,0 +1,57 @@ 
+/* Ensure jlt, jslt, jle and jsle instructions are not generated if
+   -mjmpext is not enabled, and no 32-bit jump instructions are generated
+   if -mjmp32 is not enabled.  */
+
+/* { dg-do compile } */
+/* { dg-options "-mno-jmpext -mno-jmp32" } */
+
+int foo (int a, int b)
+{
+  if (a == 1)
+    b += 1;
+  if (a != 3)
+    b += 2;
+  if (a > 5)
+    b += 3;
+  if (a >= 7)
+    b += 4;
+  if (a < 9)
+    b += 5;
+  if (a <= 10)
+    b += 6;
+
+  return a + b;
+}
+
+unsigned int bar (unsigned int a, unsigned int b)
+{
+  if (a == 1)
+    b += 1;
+  if (a != 3)
+    b += 2;
+  if (a > 5)
+    b += 3;
+  if (a >= 7)
+    b += 4;
+  if (a < 9)
+    b += 5;
+  if (a <= 10)
+    b += 6;
+
+  return a + b;
+}
+
+/* { dg-final { scan-assembler-times "jlt\t0" 0 } } */
+/* { dg-final { scan-assembler-times "jslt\t0" 0 } } */
+/* { dg-final { scan-assembler-times "jle\t0" 0 } } */
+/* { dg-final { scan-assembler-times "jsle\t0" 0 } } */
+/* { dg-final { scan-assembler-times "jeq32\t0" 0 } } */
+/* { dg-final { scan-assembler-times "jne32\t0" 0 } } */
+/* { dg-final { scan-assembler-times "jlt32\t0" 0 } } */
+/* { dg-final { scan-assembler-times "jgt32\t0" 0 } } */
+/* { dg-final { scan-assembler-times "jle32\t0" 0 } } */
+/* { dg-final { scan-assembler-times "jge32\t0" 0 } } */
+/* { dg-final { scan-assembler-times "jslt32\t0" 0 } } */
+/* { dg-final { scan-assembler-times "jsgt32\t0" 0 } } */
+/* { dg-final { scan-assembler-times "jsle32\t0" 0 } } */
+/* { dg-final { scan-assembler-times "jsge32\t0" 0 } } */