[committed] Use memory loads and extensions for cmp/test elimination on H8

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  • [committed] Use memory loads and extensions for cmp/test elimination on H8
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Martin Sebor via Gcc-patches June 10, 2021, 2:02 p.m.
In today's episode of optimizing a dead architecture we're using memory 
loads and extensions to eliminate redundant test/compare instructions.  
Memory loads are very straightforward, they set ZN in the expected way, 
but weren't recognized by h8300_select_cc_mode and were thus not used. 
Trivially fixed.

Extensions are simple as well.  Sign extension works exactly how you 
would expect, setting ZN.  Zero extension sets Z and clears N, which if 
you think about it makes perfect sense too and matches GCC's semantics, 
so we can pretend zero extensions set ZN.

I'm seeing a little bouncing on the H8 testsuite, but it's a case where 
the stack and the code segments clash.  When this happens its not 
unusual for a test's state to bounce around when the code changes.

Note that we can do better still for testing if a memory object is >= 0 
or < 0.  We have the ability to copy the sign bit from a memory location 
into C without loading the memory into a register.  We're not supporting 
this *yet*, but I do expect to start exposing the C bit at some point 
and handling that case should naturally fall out.

Committed to the trunk,
Jeff
commit 6fcba9ef23e4261a6279a76890b2c1488cc14d12
Author: Jeff Law <jeffreyalaw@gmail.com>
Date:   Thu Jun 10 09:57:51 2021 -0400

    Use memory loads and extensions to eliminate redundant test/compare insns
    
    gcc/
    
            * config/h8300/h8300.c (select_cc_mode): Handle MEM.  Use
            REG_P.
            * config/h8300/extensions.md: Replace _clobber_flags patterns
            with <cczn>.

Patch

diff --git a/gcc/config/h8300/extensions.md b/gcc/config/h8300/extensions.md
index bc10179dac5..74647c79cd8 100644
--- a/gcc/config/h8300/extensions.md
+++ b/gcc/config/h8300/extensions.md
@@ -20,7 +20,7 @@ 
   [(parallel [(set (match_dup 0) (zero_extend:HI (match_dup 1)))
 	      (clobber (reg:CC CC_REG))])])
 
-(define_insn "*zero_extendqihi2_clobber_flags"
+(define_insn "*zero_extendqihi2<cczn>"
   [(set (match_operand:HI 0 "register_operand" "=r,r")
 	(zero_extend:HI (match_operand:QI 1 "general_operand_src" "0,g>")))
    (clobber (reg:CC CC_REG))]
@@ -95,7 +95,7 @@ 
   [(parallel [(set (match_dup 0) (zero_extend:SI (match_dup 1)))
 	      (clobber (reg:CC CC_REG))])])
 
-(define_insn "*zero_extendqisi2_h8sx_clobber_flags"
+(define_insn "*zero_extendqisi2_h8sx<cczn>"
   [(set (match_operand:SI 0 "register_operand" "=r")
 	(zero_extend:SI (match_operand:QI 1 "register_operand" "0")))
    (clobber (reg:CC CC_REG))]
@@ -118,7 +118,7 @@ 
   [(parallel [(set (match_dup 0) (zero_extend:SI (match_dup 1)))
 	      (clobber (reg:CC CC_REG))])])
 
-(define_insn "*zero_extendhisi2_clobber_flags"
+(define_insn "*zero_extendhisi2<cczn>"
   [(set (match_operand:SI 0 "register_operand" "=r")
 	(zero_extend:SI (match_operand:HI 1 "register_operand" "0")))
    (clobber (reg:CC CC_REG))]
@@ -141,7 +141,7 @@ 
   [(parallel [(set (match_dup 0) (sign_extend:HI (match_dup 1)))
 	      (clobber (reg:CC CC_REG))])])
 
-(define_insn "*extendqihi2_clobber_flags"
+(define_insn "*extendqihi2<cczn>"
   [(set (match_operand:HI 0 "register_operand" "=r")
 	(sign_extend:HI (match_operand:QI 1 "register_operand" "0")))
    (clobber (reg:CC CC_REG))]
@@ -176,7 +176,7 @@ 
   [(parallel [(set (match_dup 0) (sign_extend:SI (match_dup 1)))
 	      (clobber (reg:CC CC_REG))])])
 
-(define_insn "*extendqisi2_h8sx_clobber_flags"
+(define_insn "*extendqisi2_h8sx<cczn>"
   [(set (match_operand:SI 0 "register_operand" "=r")
 	(sign_extend:SI (match_operand:QI 1 "register_operand" "0")))
    (clobber (reg:CC CC_REG))]
@@ -199,7 +199,7 @@ 
   [(parallel [(set (match_dup 0) (sign_extend:SI (match_dup 1)))
 	      (clobber (reg:CC CC_REG))])])
 
-(define_insn "*extendhisi2_clobber_flags"
+(define_insn "*extendhisi2<cczn>"
   [(set (match_operand:SI 0 "register_operand" "=r")
 	(sign_extend:SI (match_operand:HI 1 "register_operand" "0")))
    (clobber (reg:CC CC_REG))]
diff --git a/gcc/config/h8300/h8300.c b/gcc/config/h8300/h8300.c
index ef947aa468a..1077a2b6ae0 100644
--- a/gcc/config/h8300/h8300.c
+++ b/gcc/config/h8300/h8300.c
@@ -1950,7 +1950,9 @@  h8300_select_cc_mode (enum rtx_code cond, rtx op0, rtx op1)
           || GET_CODE (op0) == NEG || GET_CODE (op0) == AND
           || GET_CODE (op0) == IOR || GET_CODE (op0) == XOR
           || GET_CODE (op0) == NOT || GET_CODE (op0) == ASHIFT
-	  || GET_CODE (op0) == REG || GET_CODE (op0) == MULT))
+	  || GET_CODE (op0) == MULT
+	  || GET_CODE (op0) == SIGN_EXTEND || GET_CODE (op0) == ZERO_EXTEND
+	  || REG_P (op0) || MEM_P (op0)))
     return CCZNmode;
 
   return CCmode;