x86-64: adjust recently added tests

Message ID 2d85724e-f9a4-36f3-e163-ed7361c729f4@suse.com
State New
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Series
  • x86-64: adjust recently added tests
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Commit Message

Nick Clifton via Binutils April 29, 2021, 12:44 p.m.
Five of them fail for Cygwin and MingW. Adjust four and move one to the
ELF-only section.

gas/
2021-04-XX  Jan Beulich  <jbeulich@suse.com>

	* testsuite/gas/i386/i386.exp: Move x86-64-rip-2 invocation.
	* testsuite/gas/i386/lea64.d,
	testsuite/gas/i386/lea64-optimize.d: Allow for COFF relocs.
	* testsuite/gas/i386/x86-64-rip-inval-1.s,
	testsuite/gas/i386/x86-64-rip-inval-2.s. Add .end.

Comments

Nick Clifton via Binutils April 29, 2021, 1 p.m. | #1
On Thu, Apr 29, 2021 at 5:44 AM Jan Beulich <jbeulich@suse.com> wrote:
>

> Five of them fail for Cygwin and MingW. Adjust four and move one to the

> ELF-only section.

>

> gas/

> 2021-04-XX  Jan Beulich  <jbeulich@suse.com>

>

>         * testsuite/gas/i386/i386.exp: Move x86-64-rip-2 invocation.

>         * testsuite/gas/i386/lea64.d,

>         testsuite/gas/i386/lea64-optimize.d: Allow for COFF relocs.

>         * testsuite/gas/i386/x86-64-rip-inval-1.s,

>         testsuite/gas/i386/x86-64-rip-inval-2.s. Add .end.

>

> --- a/gas/testsuite/gas/i386/i386.exp

> +++ b/gas/testsuite/gas/i386/i386.exp

> @@ -765,7 +765,6 @@ if [gas_64_check] then {

>      run_list_test "pcrel64" "-al"

>      run_dump_test "x86-64-rip"

>      run_dump_test "x86-64-rip-intel"

> -    run_dump_test "x86-64-rip-2"

>      run_list_test "x86-64-rip-inval-1" "-al"

>      run_list_test "x86-64-rip-inval-2" "-al"

>      run_dump_test "x86-64-stack"

> @@ -1279,6 +1278,8 @@ if [gas_64_check] then {

>         run_list_test "x86-64-branch-4" "-al -mintel64"

>         run_list_test "x86-64-branch-5" "-al"

>

> +       run_dump_test "x86-64-rip-2"

> +

>         run_dump_test "x86-64-gotpcrel"

>         run_dump_test "x86-64-gotpcrel-no-relax"

>         run_dump_test "x86-64-gotpcrel-2"

> --- a/gas/testsuite/gas/i386/lea64-optimize.d

> +++ b/gas/testsuite/gas/i386/lea64-optimize.d

> @@ -11,8 +11,8 @@ Disassembly of section .text:

>  [      ]*[0-9a-f]+:[   ]+8d 04 08[     ]+lea[  ]+\(%rax,%rcx(,1)?\),%eax

>  [      ]*[0-9a-f]+:[   ]+8d 04 08[     ]+lea[  ]+\(%rax,%rcx(,1)?\),%eax

>  [      ]*[0-9a-f]+:[   ]+8d 48 01[     ]+lea[  ]+0x1\(%rax\),%ecx

> -[      ]*[0-9a-f]+:[   ]+8d 88 00 00 00 00[    ]+lea[  ]+0x0\(%rax\),%ecx[     ]+[0-9a-f]+: R_X86_64_32[       ]+sym

> -[      ]*[0-9a-f]+:[   ]+8d 0c 25 00 00 00 00[         ]+lea[  ]+0x0,%ecx[     ]+[0-9a-f]+: R_X86_64_32[       ]+sym

> +[      ]*[0-9a-f]+:[   ]+8d 88 00 00 00 00[    ]+lea[  ]+0x0\(%rax\),%ecx[     ]+[0-9a-f]+: (R_X86_64_32|IMAGE_REL_AMD64_ADDR32)[      ]+sym

> +[      ]*[0-9a-f]+:[   ]+8d 0c 25 00 00 00 00[         ]+lea[  ]+0x0,%ecx[     ]+[0-9a-f]+: (R_X86_64_32|IMAGE_REL_AMD64_ADDR32)[      ]+sym

>  [      ]*[0-9a-f]+:[   ]+8d 04 00[     ]+lea[  ]+\(%rax,%rax(,1)?\),%eax

>  [      ]*[0-9a-f]+:[   ]+8d 04 45 00 00 00 00[         ]+lea[  ]+0x0\(,%rax,2\),%eax

>  [      ]*[0-9a-f]+:[   ]+8d 05 00 00 00 00[    ]+lea[  ]+0x0\(%rip\),%eax($| *#.*)

> @@ -60,11 +60,11 @@ Disassembly of section .text:

>  [      ]*[0-9a-f]+:[   ]+b8 fe ff ff ff[       ]+mov[  ]+\$0xfffffffe,%eax

>  [      ]*[0-9a-f]+:[   ]+66 b8 fd ff[  ]+mov[  ]+\$0xfffd,%ax

>  [      ]*[0-9a-f]+:[   ]+48 c7 c0 00 00 00 00[         ]+mov[  ]+\$0x0,%rax[   ]+[0-9a-f]+: R_X86_64_32S[      ]+sym

> -[      ]*[0-9a-f]+:[   ]+b8 00 00 00 00[       ]+mov[  ]+\$0x0,%eax[   ]+[0-9a-f]+: R_X86_64_32[       ]+sym

> -[      ]*[0-9a-f]+:[   ]+66 8d 04 25 00 00 00 00[      ]+lea[  ]+0x0,%ax[      ]+[0-9a-f]+: R_X86_64_32[       ]+sym

> -[      ]*[0-9a-f]+:[   ]+b8 00 00 00 00[       ]+mov[  ]+\$0x0,%eax[   ]+[0-9a-f]+: R_X86_64_32[       ]+sym

> -[      ]*[0-9a-f]+:[   ]+b8 00 00 00 00[       ]+mov[  ]+\$0x0,%eax[   ]+[0-9a-f]+: R_X86_64_32[       ]+sym

> -[      ]*[0-9a-f]+:[   ]+66 8d 04 25 00 00 00 00[      ]+lea[  ]+0x0,%ax[      ]+[0-9a-f]+: R_X86_64_32[       ]+sym

> +[      ]*[0-9a-f]+:[   ]+b8 00 00 00 00[       ]+mov[  ]+\$0x0,%eax[   ]+[0-9a-f]+: (R_X86_64_32|IMAGE_REL_AMD64_ADDR32)[      ]+sym

> +[      ]*[0-9a-f]+:[   ]+66 8d 04 25 00 00 00 00[      ]+lea[  ]+0x0,%ax[      ]+[0-9a-f]+: (R_X86_64_32|IMAGE_REL_AMD64_ADDR32)[      ]+sym

> +[      ]*[0-9a-f]+:[   ]+b8 00 00 00 00[       ]+mov[  ]+\$0x0,%eax[   ]+[0-9a-f]+: (R_X86_64_32|IMAGE_REL_AMD64_ADDR32)[      ]+sym

> +[      ]*[0-9a-f]+:[   ]+b8 00 00 00 00[       ]+mov[  ]+\$0x0,%eax[   ]+[0-9a-f]+: (R_X86_64_32|IMAGE_REL_AMD64_ADDR32)[      ]+sym

> +[      ]*[0-9a-f]+:[   ]+66 8d 04 25 00 00 00 00[      ]+lea[  ]+0x0,%ax[      ]+[0-9a-f]+: (R_X86_64_32|IMAGE_REL_AMD64_ADDR32)[      ]+sym

>  [      ]*[0-9a-f]+:[   ]+48 c7 c0 00 00 00 00[         ]+mov[  ]+\$0x0,%rax

>  [      ]*[0-9a-f]+:[   ]+b8 00 00 00 00[       ]+mov[  ]+\$0x0,%eax

>  [      ]*[0-9a-f]+:[   ]+66 b8 00 00[  ]+mov[  ]+\$0x0,%ax

> --- a/gas/testsuite/gas/i386/lea64.d

> +++ b/gas/testsuite/gas/i386/lea64.d

> @@ -10,8 +10,8 @@ Disassembly of section .text:

>  [      ]*[0-9a-f]+:[   ]+64 8d 04 08[  ]+lea[  ]+%fs:\(%rax,%rcx(,1)?\),%eax

>  [      ]*[0-9a-f]+:[   ]+65 8d 04 08[  ]+lea[  ]+%gs:\(%rax,%rcx(,1)?\),%eax

>  [      ]*[0-9a-f]+:[   ]+8d 48 01[     ]+lea[  ]+0x1\(%rax\),%ecx

> -[      ]*[0-9a-f]+:[   ]+8d 88 00 00 00 00[    ]+lea[  ]+0x0\(%rax\),%ecx[     ]+[0-9a-f]+: R_X86_64_32[       ]+sym

> -[      ]*[0-9a-f]+:[   ]+8d 0c 25 00 00 00 00[         ]+lea[  ]+0x0,%ecx[     ]+[0-9a-f]+: R_X86_64_32[       ]+sym

> +[      ]*[0-9a-f]+:[   ]+8d 88 00 00 00 00[    ]+lea[  ]+0x0\(%rax\),%ecx[     ]+[0-9a-f]+: (R_X86_64_32|IMAGE_REL_AMD64_ADDR32)[      ]+sym

> +[      ]*[0-9a-f]+:[   ]+8d 0c 25 00 00 00 00[         ]+lea[  ]+0x0,%ecx[     ]+[0-9a-f]+: (R_X86_64_32|IMAGE_REL_AMD64_ADDR32)[      ]+sym

>  [      ]*[0-9a-f]+:[   ]+8d 04 00[     ]+lea[  ]+\(%rax,%rax(,1)?\),%eax

>  [      ]*[0-9a-f]+:[   ]+8d 04 45 00 00 00 00[         ]+lea[  ]+0x0\(,%rax,2\),%eax

>  [      ]*[0-9a-f]+:[   ]+8d 05 00 00 00 00[    ]+lea[  ]+0x0\(%rip\),%eax($| *#.*)

> @@ -59,11 +59,11 @@ Disassembly of section .text:

>  [      ]*[0-9a-f]+:[   ]+67 8d 04 25 fe ff ff ff[      ]+lea[  ]+0xfffffffe\(,%eiz,1\),%eax

>  [      ]*[0-9a-f]+:[   ]+67 66 8d 04 25 fd ff ff ff[   ]+lea[  ]+0xfffffffd\(,%eiz,1\),%ax

>  [      ]*[0-9a-f]+:[   ]+48 8d 04 25 00 00 00 00[      ]+lea[  ]+0x0,%rax[     ]+[0-9a-f]+: R_X86_64_32S[      ]+sym

> -[      ]*[0-9a-f]+:[   ]+8d 04 25 00 00 00 00[         ]+lea[  ]+0x0,%eax[     ]+[0-9a-f]+: R_X86_64_32[       ]+sym

> -[      ]*[0-9a-f]+:[   ]+66 8d 04 25 00 00 00 00[      ]+lea[  ]+0x0,%ax[      ]+[0-9a-f]+: R_X86_64_32[       ]+sym

> -[      ]*[0-9a-f]+:[   ]+67 48 8d 04 25 00 00 00 00[   ]+lea[  ]+0x0\(,%eiz,1\),%rax[  ]+[0-9a-f]+: R_X86_64_32[       ]+sym

> -[      ]*[0-9a-f]+:[   ]+67 8d 04 25 00 00 00 00[      ]+lea[  ]+0x0\(,%eiz,1\),%eax[  ]+[0-9a-f]+: R_X86_64_32[       ]+sym

> -[      ]*[0-9a-f]+:[   ]+67 66 8d 04 25 00 00 00 00[   ]+lea[  ]+0x0\(,%eiz,1\),%ax[   ]+[0-9a-f]+: R_X86_64_32[       ]+sym

> +[      ]*[0-9a-f]+:[   ]+8d 04 25 00 00 00 00[         ]+lea[  ]+0x0,%eax[     ]+[0-9a-f]+: (R_X86_64_32|IMAGE_REL_AMD64_ADDR32)[      ]+sym

> +[      ]*[0-9a-f]+:[   ]+66 8d 04 25 00 00 00 00[      ]+lea[  ]+0x0,%ax[      ]+[0-9a-f]+: (R_X86_64_32|IMAGE_REL_AMD64_ADDR32)[      ]+sym

> +[      ]*[0-9a-f]+:[   ]+67 48 8d 04 25 00 00 00 00[   ]+lea[  ]+0x0\(,%eiz,1\),%rax[  ]+[0-9a-f]+: (R_X86_64_32|IMAGE_REL_AMD64_ADDR32)[      ]+sym

> +[      ]*[0-9a-f]+:[   ]+67 8d 04 25 00 00 00 00[      ]+lea[  ]+0x0\(,%eiz,1\),%eax[  ]+[0-9a-f]+: (R_X86_64_32|IMAGE_REL_AMD64_ADDR32)[      ]+sym

> +[      ]*[0-9a-f]+:[   ]+67 66 8d 04 25 00 00 00 00[   ]+lea[  ]+0x0\(,%eiz,1\),%ax[   ]+[0-9a-f]+: (R_X86_64_32|IMAGE_REL_AMD64_ADDR32)[      ]+sym

>  [      ]*[0-9a-f]+:[   ]+48 8d 04 25 00 00 00 00[      ]+lea[  ]+0x0,%rax

>  [      ]*[0-9a-f]+:[   ]+8d 04 25 00 00 00 00[         ]+lea[  ]+0x0,%eax

>  [      ]*[0-9a-f]+:[   ]+66 8d 04 25 00 00 00 00[      ]+lea[  ]+0x0,%ax

> --- a/gas/testsuite/gas/i386/x86-64-rip-inval-1.s

> +++ b/gas/testsuite/gas/i386/x86-64-rip-inval-1.s

> @@ -2,3 +2,4 @@

>  _start:

>         movq test1(%rip), %rax

>         .set test1, . - 0x80000001

> +       .end

> --- a/gas/testsuite/gas/i386/x86-64-rip-inval-2.s

> +++ b/gas/testsuite/gas/i386/x86-64-rip-inval-2.s

> @@ -2,3 +2,4 @@

>  _start:

>         movq test1(%rip), %rax

>         .set test1, . + 0x80000000

> +       .end


OK.

Thanks.

-- 
H.J.

Patch

--- a/gas/testsuite/gas/i386/i386.exp
+++ b/gas/testsuite/gas/i386/i386.exp
@@ -765,7 +765,6 @@  if [gas_64_check] then {
     run_list_test "pcrel64" "-al"
     run_dump_test "x86-64-rip"
     run_dump_test "x86-64-rip-intel"
-    run_dump_test "x86-64-rip-2"
     run_list_test "x86-64-rip-inval-1" "-al"
     run_list_test "x86-64-rip-inval-2" "-al"
     run_dump_test "x86-64-stack"
@@ -1279,6 +1278,8 @@  if [gas_64_check] then {
 	run_list_test "x86-64-branch-4" "-al -mintel64"
 	run_list_test "x86-64-branch-5" "-al"
 
+	run_dump_test "x86-64-rip-2"
+
 	run_dump_test "x86-64-gotpcrel"
 	run_dump_test "x86-64-gotpcrel-no-relax"
 	run_dump_test "x86-64-gotpcrel-2"
--- a/gas/testsuite/gas/i386/lea64-optimize.d
+++ b/gas/testsuite/gas/i386/lea64-optimize.d
@@ -11,8 +11,8 @@  Disassembly of section .text:
 [ 	]*[0-9a-f]+:[ 	]+8d 04 08[ 	]+lea[ 	]+\(%rax,%rcx(,1)?\),%eax
 [ 	]*[0-9a-f]+:[ 	]+8d 04 08[ 	]+lea[ 	]+\(%rax,%rcx(,1)?\),%eax
 [ 	]*[0-9a-f]+:[ 	]+8d 48 01[ 	]+lea[ 	]+0x1\(%rax\),%ecx
-[ 	]*[0-9a-f]+:[ 	]+8d 88 00 00 00 00[ 	]+lea[ 	]+0x0\(%rax\),%ecx[ 	]+[0-9a-f]+: R_X86_64_32[ 	]+sym
-[ 	]*[0-9a-f]+:[ 	]+8d 0c 25 00 00 00 00[ 	]+lea[ 	]+0x0,%ecx[ 	]+[0-9a-f]+: R_X86_64_32[ 	]+sym
+[ 	]*[0-9a-f]+:[ 	]+8d 88 00 00 00 00[ 	]+lea[ 	]+0x0\(%rax\),%ecx[ 	]+[0-9a-f]+: (R_X86_64_32|IMAGE_REL_AMD64_ADDR32)[ 	]+sym
+[ 	]*[0-9a-f]+:[ 	]+8d 0c 25 00 00 00 00[ 	]+lea[ 	]+0x0,%ecx[ 	]+[0-9a-f]+: (R_X86_64_32|IMAGE_REL_AMD64_ADDR32)[ 	]+sym
 [ 	]*[0-9a-f]+:[ 	]+8d 04 00[ 	]+lea[ 	]+\(%rax,%rax(,1)?\),%eax
 [ 	]*[0-9a-f]+:[ 	]+8d 04 45 00 00 00 00[ 	]+lea[ 	]+0x0\(,%rax,2\),%eax
 [ 	]*[0-9a-f]+:[ 	]+8d 05 00 00 00 00[ 	]+lea[ 	]+0x0\(%rip\),%eax($| *#.*)
@@ -60,11 +60,11 @@  Disassembly of section .text:
 [ 	]*[0-9a-f]+:[ 	]+b8 fe ff ff ff[ 	]+mov[ 	]+\$0xfffffffe,%eax
 [ 	]*[0-9a-f]+:[ 	]+66 b8 fd ff[ 	]+mov[ 	]+\$0xfffd,%ax
 [ 	]*[0-9a-f]+:[ 	]+48 c7 c0 00 00 00 00[ 	]+mov[ 	]+\$0x0,%rax[ 	]+[0-9a-f]+: R_X86_64_32S[ 	]+sym
-[ 	]*[0-9a-f]+:[ 	]+b8 00 00 00 00[ 	]+mov[ 	]+\$0x0,%eax[ 	]+[0-9a-f]+: R_X86_64_32[ 	]+sym
-[ 	]*[0-9a-f]+:[ 	]+66 8d 04 25 00 00 00 00[ 	]+lea[ 	]+0x0,%ax[ 	]+[0-9a-f]+: R_X86_64_32[ 	]+sym
-[ 	]*[0-9a-f]+:[ 	]+b8 00 00 00 00[ 	]+mov[ 	]+\$0x0,%eax[ 	]+[0-9a-f]+: R_X86_64_32[ 	]+sym
-[ 	]*[0-9a-f]+:[ 	]+b8 00 00 00 00[ 	]+mov[ 	]+\$0x0,%eax[ 	]+[0-9a-f]+: R_X86_64_32[ 	]+sym
-[ 	]*[0-9a-f]+:[ 	]+66 8d 04 25 00 00 00 00[ 	]+lea[ 	]+0x0,%ax[ 	]+[0-9a-f]+: R_X86_64_32[ 	]+sym
+[ 	]*[0-9a-f]+:[ 	]+b8 00 00 00 00[ 	]+mov[ 	]+\$0x0,%eax[ 	]+[0-9a-f]+: (R_X86_64_32|IMAGE_REL_AMD64_ADDR32)[ 	]+sym
+[ 	]*[0-9a-f]+:[ 	]+66 8d 04 25 00 00 00 00[ 	]+lea[ 	]+0x0,%ax[ 	]+[0-9a-f]+: (R_X86_64_32|IMAGE_REL_AMD64_ADDR32)[ 	]+sym
+[ 	]*[0-9a-f]+:[ 	]+b8 00 00 00 00[ 	]+mov[ 	]+\$0x0,%eax[ 	]+[0-9a-f]+: (R_X86_64_32|IMAGE_REL_AMD64_ADDR32)[ 	]+sym
+[ 	]*[0-9a-f]+:[ 	]+b8 00 00 00 00[ 	]+mov[ 	]+\$0x0,%eax[ 	]+[0-9a-f]+: (R_X86_64_32|IMAGE_REL_AMD64_ADDR32)[ 	]+sym
+[ 	]*[0-9a-f]+:[ 	]+66 8d 04 25 00 00 00 00[ 	]+lea[ 	]+0x0,%ax[ 	]+[0-9a-f]+: (R_X86_64_32|IMAGE_REL_AMD64_ADDR32)[ 	]+sym
 [ 	]*[0-9a-f]+:[ 	]+48 c7 c0 00 00 00 00[ 	]+mov[ 	]+\$0x0,%rax
 [ 	]*[0-9a-f]+:[ 	]+b8 00 00 00 00[ 	]+mov[ 	]+\$0x0,%eax
 [ 	]*[0-9a-f]+:[ 	]+66 b8 00 00[ 	]+mov[ 	]+\$0x0,%ax
--- a/gas/testsuite/gas/i386/lea64.d
+++ b/gas/testsuite/gas/i386/lea64.d
@@ -10,8 +10,8 @@  Disassembly of section .text:
 [ 	]*[0-9a-f]+:[ 	]+64 8d 04 08[ 	]+lea[ 	]+%fs:\(%rax,%rcx(,1)?\),%eax
 [ 	]*[0-9a-f]+:[ 	]+65 8d 04 08[ 	]+lea[ 	]+%gs:\(%rax,%rcx(,1)?\),%eax
 [ 	]*[0-9a-f]+:[ 	]+8d 48 01[ 	]+lea[ 	]+0x1\(%rax\),%ecx
-[ 	]*[0-9a-f]+:[ 	]+8d 88 00 00 00 00[ 	]+lea[ 	]+0x0\(%rax\),%ecx[ 	]+[0-9a-f]+: R_X86_64_32[ 	]+sym
-[ 	]*[0-9a-f]+:[ 	]+8d 0c 25 00 00 00 00[ 	]+lea[ 	]+0x0,%ecx[ 	]+[0-9a-f]+: R_X86_64_32[ 	]+sym
+[ 	]*[0-9a-f]+:[ 	]+8d 88 00 00 00 00[ 	]+lea[ 	]+0x0\(%rax\),%ecx[ 	]+[0-9a-f]+: (R_X86_64_32|IMAGE_REL_AMD64_ADDR32)[ 	]+sym
+[ 	]*[0-9a-f]+:[ 	]+8d 0c 25 00 00 00 00[ 	]+lea[ 	]+0x0,%ecx[ 	]+[0-9a-f]+: (R_X86_64_32|IMAGE_REL_AMD64_ADDR32)[ 	]+sym
 [ 	]*[0-9a-f]+:[ 	]+8d 04 00[ 	]+lea[ 	]+\(%rax,%rax(,1)?\),%eax
 [ 	]*[0-9a-f]+:[ 	]+8d 04 45 00 00 00 00[ 	]+lea[ 	]+0x0\(,%rax,2\),%eax
 [ 	]*[0-9a-f]+:[ 	]+8d 05 00 00 00 00[ 	]+lea[ 	]+0x0\(%rip\),%eax($| *#.*)
@@ -59,11 +59,11 @@  Disassembly of section .text:
 [ 	]*[0-9a-f]+:[ 	]+67 8d 04 25 fe ff ff ff[ 	]+lea[ 	]+0xfffffffe\(,%eiz,1\),%eax
 [ 	]*[0-9a-f]+:[ 	]+67 66 8d 04 25 fd ff ff ff[ 	]+lea[ 	]+0xfffffffd\(,%eiz,1\),%ax
 [ 	]*[0-9a-f]+:[ 	]+48 8d 04 25 00 00 00 00[ 	]+lea[ 	]+0x0,%rax[ 	]+[0-9a-f]+: R_X86_64_32S[ 	]+sym
-[ 	]*[0-9a-f]+:[ 	]+8d 04 25 00 00 00 00[ 	]+lea[ 	]+0x0,%eax[ 	]+[0-9a-f]+: R_X86_64_32[ 	]+sym
-[ 	]*[0-9a-f]+:[ 	]+66 8d 04 25 00 00 00 00[ 	]+lea[ 	]+0x0,%ax[ 	]+[0-9a-f]+: R_X86_64_32[ 	]+sym
-[ 	]*[0-9a-f]+:[ 	]+67 48 8d 04 25 00 00 00 00[ 	]+lea[ 	]+0x0\(,%eiz,1\),%rax[ 	]+[0-9a-f]+: R_X86_64_32[ 	]+sym
-[ 	]*[0-9a-f]+:[ 	]+67 8d 04 25 00 00 00 00[ 	]+lea[ 	]+0x0\(,%eiz,1\),%eax[ 	]+[0-9a-f]+: R_X86_64_32[ 	]+sym
-[ 	]*[0-9a-f]+:[ 	]+67 66 8d 04 25 00 00 00 00[ 	]+lea[ 	]+0x0\(,%eiz,1\),%ax[ 	]+[0-9a-f]+: R_X86_64_32[ 	]+sym
+[ 	]*[0-9a-f]+:[ 	]+8d 04 25 00 00 00 00[ 	]+lea[ 	]+0x0,%eax[ 	]+[0-9a-f]+: (R_X86_64_32|IMAGE_REL_AMD64_ADDR32)[ 	]+sym
+[ 	]*[0-9a-f]+:[ 	]+66 8d 04 25 00 00 00 00[ 	]+lea[ 	]+0x0,%ax[ 	]+[0-9a-f]+: (R_X86_64_32|IMAGE_REL_AMD64_ADDR32)[ 	]+sym
+[ 	]*[0-9a-f]+:[ 	]+67 48 8d 04 25 00 00 00 00[ 	]+lea[ 	]+0x0\(,%eiz,1\),%rax[ 	]+[0-9a-f]+: (R_X86_64_32|IMAGE_REL_AMD64_ADDR32)[ 	]+sym
+[ 	]*[0-9a-f]+:[ 	]+67 8d 04 25 00 00 00 00[ 	]+lea[ 	]+0x0\(,%eiz,1\),%eax[ 	]+[0-9a-f]+: (R_X86_64_32|IMAGE_REL_AMD64_ADDR32)[ 	]+sym
+[ 	]*[0-9a-f]+:[ 	]+67 66 8d 04 25 00 00 00 00[ 	]+lea[ 	]+0x0\(,%eiz,1\),%ax[ 	]+[0-9a-f]+: (R_X86_64_32|IMAGE_REL_AMD64_ADDR32)[ 	]+sym
 [ 	]*[0-9a-f]+:[ 	]+48 8d 04 25 00 00 00 00[ 	]+lea[ 	]+0x0,%rax
 [ 	]*[0-9a-f]+:[ 	]+8d 04 25 00 00 00 00[ 	]+lea[ 	]+0x0,%eax
 [ 	]*[0-9a-f]+:[ 	]+66 8d 04 25 00 00 00 00[ 	]+lea[ 	]+0x0,%ax
--- a/gas/testsuite/gas/i386/x86-64-rip-inval-1.s
+++ b/gas/testsuite/gas/i386/x86-64-rip-inval-1.s
@@ -2,3 +2,4 @@ 
 _start:
 	movq test1(%rip), %rax
 	.set test1, . - 0x80000001
+	.end
--- a/gas/testsuite/gas/i386/x86-64-rip-inval-2.s
+++ b/gas/testsuite/gas/i386/x86-64-rip-inval-2.s
@@ -2,3 +2,4 @@ 
 _start:
 	movq test1(%rip), %rax
 	.set test1, . + 0x80000000
+	.end