opcodes int vs bfd_boolean fixes

Message ID 20210329004250.GI5425@bubble.grove.modra.org
State New
Headers show
Series
  • opcodes int vs bfd_boolean fixes
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Commit Message

Luis Machado via Binutils March 29, 2021, 12:42 a.m.
Prototype vs. definition mismatches.

cpu/
	* frv.opc (frv_is_branch_major, frv_is_float_major),
	(frv_is_media_major, frv_is_branch_insn, frv_is_float_insn),
	(frv_is_media_insn, spr_valid): Correct prototypes.
include/
	* opcode/aarch64.h (aarch64_opcode_encode): Correct prototype.
opcodes/
	* arc-dis.c (extract_operand_value): Correct NULL cast.
	* frv-opc.h: Regenerate.


-- 
Alan Modra
Australia Development Lab, IBM

Patch

diff --git a/cpu/frv.opc b/cpu/frv.opc
index 1b0b05c29a0..7863462dafe 100644
--- a/cpu/frv.opc
+++ b/cpu/frv.opc
@@ -66,15 +66,15 @@  typedef struct
   const CGEN_INSN *      insn[FRV_VLIW_SIZE];
 } FRV_VLIW;
 
-int frv_is_branch_major (CGEN_ATTR_VALUE_ENUM_TYPE, unsigned long);
-int frv_is_float_major  (CGEN_ATTR_VALUE_ENUM_TYPE, unsigned long);
-int frv_is_media_major  (CGEN_ATTR_VALUE_ENUM_TYPE, unsigned long);
-int frv_is_branch_insn  (const CGEN_INSN *);
-int frv_is_float_insn   (const CGEN_INSN *);
-int frv_is_media_insn   (const CGEN_INSN *);
-void frv_vliw_reset     (FRV_VLIW *, unsigned long, unsigned long);
-int frv_vliw_add_insn   (FRV_VLIW *, const CGEN_INSN *);
-int spr_valid           (long);
+bfd_boolean frv_is_branch_major (CGEN_ATTR_VALUE_ENUM_TYPE, unsigned long);
+bfd_boolean frv_is_float_major  (CGEN_ATTR_VALUE_ENUM_TYPE, unsigned long);
+bfd_boolean frv_is_media_major  (CGEN_ATTR_VALUE_ENUM_TYPE, unsigned long);
+bfd_boolean frv_is_branch_insn  (const CGEN_INSN *);
+bfd_boolean frv_is_float_insn   (const CGEN_INSN *);
+bfd_boolean frv_is_media_insn   (const CGEN_INSN *);
+void        frv_vliw_reset      (FRV_VLIW *, unsigned long, unsigned long);
+int         frv_vliw_add_insn   (FRV_VLIW *, const CGEN_INSN *);
+bfd_boolean spr_valid           (long);
 /* -- */
 
 /* -- opc.c */
diff --git a/include/opcode/aarch64.h b/include/opcode/aarch64.h
index f9986910310..dd4ab22f9ae 100644
--- a/include/opcode/aarch64.h
+++ b/include/opcode/aarch64.h
@@ -1264,7 +1264,7 @@  struct aarch64_instr_sequence
 
 /* Encoding entrypoint.  */
 
-extern int
+extern bfd_boolean
 aarch64_opcode_encode (const aarch64_opcode *, const aarch64_inst *,
 		       aarch64_insn *, aarch64_opnd_qualifier_t *,
 		       aarch64_operand_error *, aarch64_instr_sequence *);
diff --git a/opcodes/arc-dis.c b/opcodes/arc-dis.c
index 0c9b379bd2b..a7e2db151a0 100644
--- a/opcodes/arc-dis.c
+++ b/opcodes/arc-dis.c
@@ -694,7 +694,7 @@  extract_operand_value (const struct arc_operand *operand,
   else
     {
       if (operand->extract)
-        value = (*operand->extract) (insn, (int *) NULL);
+	value = (*operand->extract) (insn, (bfd_boolean *) NULL);
       else
         {
           if (operand->flags & ARC_OPERAND_ALIGNED32)
diff --git a/opcodes/frv-opc.h b/opcodes/frv-opc.h
index 9fc69222dbe..95f47974c2a 100644
--- a/opcodes/frv-opc.h
+++ b/opcodes/frv-opc.h
@@ -58,15 +58,15 @@  typedef struct
   const CGEN_INSN *      insn[FRV_VLIW_SIZE];
 } FRV_VLIW;
 
-int frv_is_branch_major (CGEN_ATTR_VALUE_ENUM_TYPE, unsigned long);
-int frv_is_float_major  (CGEN_ATTR_VALUE_ENUM_TYPE, unsigned long);
-int frv_is_media_major  (CGEN_ATTR_VALUE_ENUM_TYPE, unsigned long);
-int frv_is_branch_insn  (const CGEN_INSN *);
-int frv_is_float_insn   (const CGEN_INSN *);
-int frv_is_media_insn   (const CGEN_INSN *);
-void frv_vliw_reset     (FRV_VLIW *, unsigned long, unsigned long);
-int frv_vliw_add_insn   (FRV_VLIW *, const CGEN_INSN *);
-int spr_valid           (long);
+bfd_boolean frv_is_branch_major (CGEN_ATTR_VALUE_ENUM_TYPE, unsigned long);
+bfd_boolean frv_is_float_major  (CGEN_ATTR_VALUE_ENUM_TYPE, unsigned long);
+bfd_boolean frv_is_media_major  (CGEN_ATTR_VALUE_ENUM_TYPE, unsigned long);
+bfd_boolean frv_is_branch_insn  (const CGEN_INSN *);
+bfd_boolean frv_is_float_insn   (const CGEN_INSN *);
+bfd_boolean frv_is_media_insn   (const CGEN_INSN *);
+void        frv_vliw_reset      (FRV_VLIW *, unsigned long, unsigned long);
+int         frv_vliw_add_insn   (FRV_VLIW *, const CGEN_INSN *);
+bfd_boolean spr_valid           (long);
 /* -- */
 /* Enum declaration for frv instruction types.  */
 typedef enum cgen_insn_type {