[committed] sel-sched: correct reset of reset_sched_cycles_p (PR 85412)

Message ID alpine.LNX.2.20.13.1904012100310.10215@monopod.intra.ispras.ru
State New
Headers show
Series
  • [committed] sel-sched: correct reset of reset_sched_cycles_p (PR 85412)
Related show

Commit Message

Alexander Monakov April 1, 2019, 6:05 p.m.
Hi,

this patch by Andrey moves an assignment to reset_sched_cycles_p
after rev. 259228 placed it incorrectly.

2019-04-01  Andrey Belevantsev  <abel@ispras.ru>

        PR rtl-optimization/85412
        * sel-sched.c (sel_sched_region): Assign reset_sched_cycles_p before
        sel_sched_region_1, not after.

        * gcc.dg/pr85412.c: New test.

Patch

diff --git a/gcc/sel-sched.c b/gcc/sel-sched.c
index 338d7c097df..552dd0b9263 100644
--- a/gcc/sel-sched.c
+++ b/gcc/sel-sched.c
@@ -7650,11 +7650,11 @@  sel_sched_region (int rgn)
       /* Schedule always selecting the next insn to make the correct data
         for bundling or other later passes.  */
       pipelining_p = false;
+      reset_sched_cycles_p = false;
       force_next_insn = 1;
       sel_sched_region_1 ();
       force_next_insn = 0;
     }
-  reset_sched_cycles_p = pipelining_p;
   sel_region_finish (reset_sched_cycles_p);
 }

diff --git a/gcc/testsuite/gcc.dg/pr85412.c b/gcc/testsuite/gcc.dg/pr85412.c
new file mode 100644
index 00000000000..11b8ceccd1e
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/pr85412.c
@@ -0,0 +1,21 @@ 
+/* { dg-do compile { target powerpc*-*-* ia64-*-* x86_64-*-* } } */
+/* { dg-require-effective-target int128 } */
+/* { dg-options "-O1 -fpeephole2 -fschedule-insns2 -fsel-sched-pipelining -fselective-scheduling2 -ftree-loop-if-convert -fno-if-conversion -fno-move-loop-invariants -fno-split-wide-types -fno-tree-dominator-opts" } */
+/* { dg-additional-options "-march=bonnell" { target x86_64-*-* } } */
+
+__int128 jv;
+
+void
+zm (__int128 g9, unsigned short int sm, short int hk)
+{
+  while (hk < 1)
+    {
+      if (jv == 0)
+        sm *= g9;
+
+      if (sm < jv)
+        hk = sm;
+
+      g9 |= sm == hk;
+    }
+}