Show patches with: Submitter = Jim Wilson       |    State = Action Required       |    Archived = No       |   70 patches
Patch Series S/W/F Date Submitter Delegate State
aarch64: Delete duplicated option docs. aarch64: Delete duplicated option docs. 0 0 0 2020-07-12 Jim Wilson New
RISC-V: Make __divdi3 handle div by zero same as hardware. RISC-V: Make __divdi3 handle div by zero same as hardware. 0 0 0 2020-06-02 Jim Wilson New
RISC-V: Optimize si to di zero-extend followed by left shift. RISC-V: Optimize si to di zero-extend followed by left shift. 0 0 0 2020-05-31 Jim Wilson New
RISC-V: Make unique SECCAT_SRODATA names start with .srodata RISC-V: Make unique SECCAT_SRODATA names start with .srodata 0 0 0 2020-05-12 Jim Wilson New
[committed] RISC-V: Improve caller-save code generation. [committed] RISC-V: Improve caller-save code generation. 0 0 0 2020-02-08 Jim Wilson New
RISC-V: Fix combined tree builds. RISC-V: Fix combined tree builds. 0 0 0 2020-01-30 Jim Wilson New
RISC-V: Fix rtl checking enabled failure with -msave-restore. RISC-V: Fix rtl checking enabled failure with -msave-restore. 0 0 0 2020-01-21 Jim Wilson New
RISC-V: Disable use of TLS copy relocs. RISC-V: Disable use of TLS copy relocs. 0 0 0 2020-01-09 Jim Wilson New
RISC-V: Build soft-float divide routines for -mno-fdiv. RISC-V: Build soft-float divide routines for -mno-fdiv. 0 0 0 2019-11-01 Jim Wilson New
Allow libcalls for complex memcpy when optimizing for size. Allow libcalls for complex memcpy when optimizing for size. 0 0 0 2019-10-31 Jim Wilson New
RISC-V: Include more registers in SIBCALL_REGS. RISC-V: Include more registers in SIBCALL_REGS. 0 0 0 2019-10-16 Jim Wilson New
[v2] Extend subst to simplify CONST_INT inside SIGN_EXTEND. [v2] Extend subst to simplify CONST_INT inside SIGN_EXTEND. 0 0 0 2019-10-10 Jim Wilson New
Modify simplify_truncation to handle extended CONST_INT. Modify simplify_truncation to handle extended CONST_INT. 0 0 0 2019-10-09 Jim Wilson New
RISC-V: Fix more splitters accidentally calling gen_reg_rtx. RISC-V: Fix more splitters accidentally calling gen_reg_rtx. 0 0 0 2019-09-19 Jim Wilson New
RISC-V: Re-enable -msave-restore for shared libraries. RISC-V: Re-enable -msave-restore for shared libraries. 0 0 0 2019-09-07 Jim Wilson New
RISC-V: Fix bad insn splits with paradoxical subregs. RISC-V: Fix bad insn splits with paradoxical subregs. 0 0 0 2019-09-05 Jim Wilson New
RISC-V: Disable -msave-restore for shared libraries. RISC-V: Disable -msave-restore for shared libraries. 0 0 0 2019-08-30 Jim Wilson New
RISC-V: Fix C ABI for flattened struct with 0-length bitfield. RISC-V: Fix C ABI for flattened struct with 0-length bitfield. 0 0 0 2019-08-05 Jim Wilson New
RISC-V: Fix splitter for 32-bit AND on 64-bit target. RISC-V: Fix splitter for 32-bit AND on 64-bit target. 0 0 0 2019-07-08 Jim Wilson New
Fix libstdc++ install-pdf support. Fix libstdc++ install-pdf support. 0 0 0 2019-07-01 Jim Wilson New
RISC-V: Move STARTFILE_PREFIX_SPEC into target OS files. RISC-V: Move STARTFILE_PREFIX_SPEC into target OS files. 0 0 0 2019-06-06 Jim Wilson New
RISC-V: Short-forward-branch opt for SiFive 7 series cores. RISC-V: Short-forward-branch opt for SiFive 7 series cores. 0 0 0 2019-04-30 Jim Wilson New
RISC-V: Promode modes of constant loads for store insns. RISC-V: Promode modes of constant loads for store insns. 0 0 0 2019-04-27 Jim Wilson New
RISC-V: Fix __riscv_compressed regression. RISC-V: Fix __riscv_compressed regression. 0 0 0 2019-03-29 Jim Wilson New
RISC-V: Add sifive-7 pipeline description. RISC-V: Add sifive-7 pipeline description. 0 0 0 2019-03-26 Jim Wilson New
RISC-V: Fix %lo overflow with BLKmode references. RISC-V: Fix %lo overflow with BLKmode references. 0 0 0 2019-03-19 Jim Wilson New
RISC-V: Fix epilogue unwind info with fp and single sp adjust. RISC-V: Fix epilogue unwind info with fp and single sp adjust. 0 0 0 2018-11-17 Jim Wilson New
RISC-V: Fix -fsignaling-nans for glibc testsuite. RISC-V: Fix -fsignaling-nans for glibc testsuite. 0 0 0 2018-10-05 Jim Wilson New
RISC-V: Add macro for ilp32e ABI. Cleanup white space. RISC-V: Add macro for ilp32e ABI. Cleanup white space. 0 0 0 2018-10-03 Jim Wilson New
RISC-V: Add missing negate patterns. RISC-V: Add missing negate patterns. 0 0 0 2018-09-26 Jim Wilson New
RISC-V: Delete obsolete MIPS comment. RISC-V: Delete obsolete MIPS comment. 0 0 0 2018-09-26 Jim Wilson New
RISC-V: Fix weak symbols with medany and explicit relocs. RISC-V: Fix weak symbols with medany and explicit relocs. 0 0 0 2018-09-25 Jim Wilson New
RISC-V: Fix problems with ilp32e ABI support. RISC-V: Fix problems with ilp32e ABI support. 0 0 0 2018-09-25 Jim Wilson New
Rewrite pic.md to improve medany and pic code size. Rewrite pic.md to improve medany and pic code size. 0 0 0 2018-08-29 Jim Wilson New
RISC-V: Fix nested function trampolines. RISC-V: Fix nested function trampolines. 0 0 0 2018-07-14 Jim Wilson New
RISC-V: Silence expected Ada testsuite warning. RISC-V: Silence expected Ada testsuite warning. 0 0 0 2018-07-12 Jim Wilson New
RISC-V: Finish Ada port. RISC-V: Finish Ada port. 0 0 0 2018-07-07 Jim Wilson New
RISC-V: Add support for riscv-*-*. RISC-V: Add support for riscv-*-*. 0 0 0 2018-07-06 Jim Wilson New
[Ada] Makefile patches from initial RISC-V cross/native build. [Ada] Makefile patches from initial RISC-V cross/native build. 0 0 0 2018-07-05 Jim Wilson New
[Ada] RISC-V: Initial riscv linux Ada port. [Ada] RISC-V: Initial riscv linux Ada port. 0 0 0 2018-07-05 Jim Wilson New
RISC-V: Fix interrupt support for -g. RISC-V: Fix interrupt support for -g. 0 0 0 2018-07-03 Jim Wilson New
RISC-V: Add patterns to convert AND mask to two shifts. RISC-V: Add patterns to convert AND mask to two shifts. 0 0 0 2018-06-30 Jim Wilson New
RISC-V: Add interrupt attribute modes. RISC-V: Add interrupt attribute modes. 0 0 0 2018-06-06 Jim Wilson New
RISC-V: Don't clobber retval when __builtin_eh_return called. RISC-V: Don't clobber retval when __builtin_eh_return called. 0 0 0 2018-06-04 Jim Wilson New
RISC-V: Add interrupt attribute support. RISC-V: Add interrupt attribute support. 0 0 0 2018-05-25 Jim Wilson New
RISC-V: Add RV32E support. RISC-V: Add RV32E support. 0 0 0 2018-05-18 Jim Wilson New
RISC-V: Minor pattern name cleanup. RISC-V: Minor pattern name cleanup. 0 0 0 2018-05-16 Jim Wilson New
RISC-V: Use new linker emulations for glibc ABI. RISC-V: Use new linker emulations for glibc ABI. 0 0 0 2018-05-04 Jim Wilson New
[2/2,RISC-V] Optimize switch with sign-extended index. [1/2,expr.c] Optimize switch with sign-extended index. 0 0 0 2018-05-02 Jim Wilson New
[1/2,expr.c] Optimize switch with sign-extended index. [1/2,expr.c] Optimize switch with sign-extended index. 0 0 0 2018-05-02 Jim Wilson New
RISC-V: Add with-multilib-list support. RISC-V: Add with-multilib-list support. 0 0 0 2018-05-01 Jim Wilson New
Add support for gcc as git submodule of another repository. Add support for gcc as git submodule of another repository. 0 0 0 2018-04-30 Jim Wilson New
RISC-V: Fix 32-bit stack pointer alignment problem. RISC-V: Fix 32-bit stack pointer alignment problem. 0 0 0 2018-04-17 Jim Wilson New
RISC-V: Fix for combine bug with shift and AND operations. RISC-V: Fix for combine bug with shift and AND operations. 0 0 0 2018-04-02 Jim Wilson New
[PR84660] Fix combine bug with SHIFT_COUNT_TRUNCATED. [PR84660] Fix combine bug with SHIFT_COUNT_TRUNCATED. 0 0 0 2018-03-20 Jim Wilson New
RISC-V: Fix bootstrap failure. RISC-V: Fix bootstrap failure. 0 0 0 2018-03-19 Jim Wilson New
RISC-V: Change sp subtracts so prologue stores can compress. RISC-V: Change sp subtracts so prologue stores can compress. 0 0 0 2018-02-15 Jim Wilson New
RISC-V: Allow register pairs for 64-bit target. RISC-V: Allow register pairs for 64-bit target. 0 0 0 2018-01-27 Jim Wilson New
RISC-V: Add --specs=nosys.specs support. RISC-V: Add --specs=nosys.specs support. 0 0 0 2018-01-26 Jim Wilson New
RISC-V: Add -mpreferred-stack-boundary option. RISC-V: Add -mpreferred-stack-boundary option. 0 0 0 2018-01-23 Jim Wilson New
RISC-V: Mark fsX as call clobbered when soft-float. RISC-V: Mark fsX as call clobbered when soft-float. 0 0 0 2018-01-17 Jim Wilson New
RISC-V: Increase mult/div cost if not implemented in hardware. RISC-V: Increase mult/div cost if not implemented in hardware. 0 0 0 2018-01-16 Jim Wilson New
RISC-V: Add naked function support. RISC-V: Add naked function support. 0 0 0 2018-01-10 Jim Wilson New
[gcc-7-branch] RISC-V: Fix -msave-restore bug with sibcalls. [gcc-7-branch] RISC-V: Fix -msave-restore bug with sibcalls. 0 0 0 2018-01-09 Jim Wilson New
RISC-V: Fix -msave-restore bug with sibcalls. RISC-V: Fix -msave-restore bug with sibcalls. 0 0 0 2018-01-09 Jim Wilson New
RISC-V: Fix for icache flush issue on multicore processors. RISC-V: Fix for icache flush issue on multicore processors. 0 0 0 2018-01-02 Jim Wilson New
RISC-V: Fix for icache flush issue on multicore processors. RISC-V: Fix for icache flush issue on multicore processors. 0 0 0 2018-01-02 Jim Wilson Superseded
[RISC-V] Use C version of multi3 for RVE support. [RISC-V] Use C version of multi3 for RVE support. 0 0 0 2017-12-13 Jim Wilson New
Add .type and .size directives to riscv libgcc functions. Add .type and .size directives to riscv libgcc functions. 0 0 0 2017-12-09 Jim Wilson New
Add srodata section support to riscv port. Add srodata section support to riscv port. 0 0 0 2017-12-08 Jim Wilson New