Backport to gcc-9: PR92398: Fix testcase failure of pr72804.c

Message ID 20200305082158.84732-1-luoxhu@linux.ibm.com
State New
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  • Backport to gcc-9: PR92398: Fix testcase failure of pr72804.c
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Commit Message

luoxhu March 5, 2020, 8:21 a.m.
From: Xionghu Luo <luoxhu@linux.ibm.com>


Backport the patch to fix failures on P9 and P8BE, P7LE for PR94036.
Tested pass on P9/P8/P7, ok to commit?
(gcc-8 is not needed as the test doesn't exists.)

P9LE generated instruction is not worse than P8LE.
mtvsrdd;xxlnot;stxv vs. not;not;std;std.
It can have longer latency, but latency via memory is not so critical,
and this does save decode and other resources.  It's hard to choose
which is best.  Update the test case to fix failures.

gcc/testsuite/ChangeLog:

	2020-03-05  Luo Xiong Hu  <luoxhu@linux.ibm.com>

	backport from master.
	PR testsuite/94036

	2019-12-02  Luo Xiong Hu  <luoxhu@linux.ibm.com>

	PR testsuite/92398
	* gcc.target/powerpc/pr72804.c: Split the store function to...
	* gcc.target/powerpc/pr92398.h: ... this one.  New.
	* gcc.target/powerpc/pr92398.p9+.c: New.
	* gcc.target/powerpc/pr92398.p9-.c: New.
	* lib/target-supports.exp (check_effective_target_p8): New.
	(check_effective_target_p9+): New.
---
 gcc/testsuite/gcc.target/powerpc/pr72804.c    | 16 +++------------
 gcc/testsuite/gcc.target/powerpc/pr92398.h    | 17 ++++++++++++++++
 .../gcc.target/powerpc/pr92398.p9+.c          | 12 +++++++++++
 .../gcc.target/powerpc/pr92398.p9-.c          | 10 ++++++++++
 gcc/testsuite/lib/target-supports.exp         | 20 +++++++++++++++++++
 5 files changed, 62 insertions(+), 13 deletions(-)
 create mode 100644 gcc/testsuite/gcc.target/powerpc/pr92398.h
 create mode 100644 gcc/testsuite/gcc.target/powerpc/pr92398.p9+.c
 create mode 100644 gcc/testsuite/gcc.target/powerpc/pr92398.p9-.c

-- 
2.21.0.777.g83232e3864

Comments

Segher Boessenkool March 9, 2020, 9:28 p.m. | #1
On Thu, Mar 05, 2020 at 02:21:58AM -0600, luoxhu@linux.ibm.com wrote:
> From: Xionghu Luo <luoxhu@linux.ibm.com>

> 

> Backport the patch to fix failures on P9 and P8BE, P7LE for PR94036.


No changes were needed?

> Tested pass on P9/P8/P7, ok to commit?


Yes, okay for 9.  Thanks!


Segher


> 	2020-03-05  Luo Xiong Hu  <luoxhu@linux.ibm.com>

> 

> 	backport from master.

> 	PR testsuite/94036

> 

> 	2019-12-02  Luo Xiong Hu  <luoxhu@linux.ibm.com>

> 

> 	PR testsuite/92398

> 	* gcc.target/powerpc/pr72804.c: Split the store function to...

> 	* gcc.target/powerpc/pr92398.h: ... this one.  New.

> 	* gcc.target/powerpc/pr92398.p9+.c: New.

> 	* gcc.target/powerpc/pr92398.p9-.c: New.

> 	* lib/target-supports.exp (check_effective_target_p8): New.

> 	(check_effective_target_p9+): New.
luoxhu March 10, 2020, 2:03 a.m. | #2
On 2020/3/10 05:28, Segher Boessenkool wrote:
> On Thu, Mar 05, 2020 at 02:21:58AM -0600, luoxhu@linux.ibm.com wrote:

>> From: Xionghu Luo <luoxhu@linux.ibm.com>

>>

>> Backport the patch to fix failures on P9 and P8BE, P7LE for PR94036.

> 

> No changes were needed?


Yes, no conflicts of the patch and instruction counts are same with
master.  Committed in r9-8357(85c08558c66dd8e2000a4ad282ca03368028fce3).


Thanks
Xionghu

> 

>> Tested pass on P9/P8/P7, ok to commit?

> 

> Yes, okay for 9.  Thanks!

> 

> 

> Segher

> 

> 

>> 	2020-03-05  Luo Xiong Hu  <luoxhu@linux.ibm.com>

>>

>> 	backport from master.

>> 	PR testsuite/94036

>>

>> 	2019-12-02  Luo Xiong Hu  <luoxhu@linux.ibm.com>

>>

>> 	PR testsuite/92398

>> 	* gcc.target/powerpc/pr72804.c: Split the store function to...

>> 	* gcc.target/powerpc/pr92398.h: ... this one.  New.

>> 	* gcc.target/powerpc/pr92398.p9+.c: New.

>> 	* gcc.target/powerpc/pr92398.p9-.c: New.

>> 	* lib/target-supports.exp (check_effective_target_p8): New.

>> 	(check_effective_target_p9+): New.

Patch

diff --git a/gcc/testsuite/gcc.target/powerpc/pr72804.c b/gcc/testsuite/gcc.target/powerpc/pr72804.c
index b83b6350d75..c0711499ae5 100644
--- a/gcc/testsuite/gcc.target/powerpc/pr72804.c
+++ b/gcc/testsuite/gcc.target/powerpc/pr72804.c
@@ -9,17 +9,7 @@  foo (__int128_t *src)
   return ~*src;
 }
 
-void
-bar (__int128_t *dst, __int128_t src)
-{
-  *dst =  ~src;
-}
 
-/* { dg-final { scan-assembler-times "not " 4 } } */
-/* { dg-final { scan-assembler-times "std " 2 } } */
-/* { dg-final { scan-assembler-times "ld " 2 } } */
-/* { dg-final { scan-assembler-not "lxvd2x" } } */
-/* { dg-final { scan-assembler-not "stxvd2x" } } */
-/* { dg-final { scan-assembler-not "xxpermdi" } } */
-/* { dg-final { scan-assembler-not "mfvsrd" } } */
-/* { dg-final { scan-assembler-not "mfvsrd" } } */
+/* { dg-final { scan-assembler-times {\mld\M} 2 } } */
+/* { dg-final { scan-assembler-times {\mnot\M} 2 } } */
+/* { dg-final { scan-assembler-not {\mlxvd2x\M} } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/pr92398.h b/gcc/testsuite/gcc.target/powerpc/pr92398.h
new file mode 100644
index 00000000000..5a4a8bcab80
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/pr92398.h
@@ -0,0 +1,17 @@ 
+/* This test code is included into pr92398.p9-.c and pr92398.p9+.c.
+   The two files have the tests for the number of instructions generated for
+   P9- versus P9+.
+
+   store generates difference instructions as below:
+   P9+: mtvsrdd;xxlnot;stxv.
+   P8/P7/P6 LE: not;not;std;std.
+   P8 BE: mtvsrd;mtvsrd;xxpermdi;xxlnor;stxvd2x.
+   P7/P6 BE: std;std;addi;lxvd2x;xxlnor;stxvd2x.
+   P9+ and P9- LE are expected, P6/P7/P8 BE are unexpected.  */
+
+void
+bar (__int128_t *dst, __int128_t src)
+{
+  *dst =  ~src;
+}
+
diff --git a/gcc/testsuite/gcc.target/powerpc/pr92398.p9+.c b/gcc/testsuite/gcc.target/powerpc/pr92398.p9+.c
new file mode 100644
index 00000000000..a819c3f16af
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/pr92398.p9+.c
@@ -0,0 +1,12 @@ 
+/* { dg-do compile { target { lp64 && p9+ } } } */
+/* { dg-require-effective-target powerpc_vsx_ok } */
+/* { dg-options "-O2 -mvsx" } */
+
+/* { dg-final { scan-assembler-times {\mmtvsrdd\M} 1 } } */
+/* { dg-final { scan-assembler-times {\mxxlnor\M} 1 } } */
+/* { dg-final { scan-assembler-times {\mstxv\M} 1 } } */
+/* { dg-final { scan-assembler-not {\mld\M} } } */
+/* { dg-final { scan-assembler-not {\mnot\M} } } */
+
+/* Source code for the test in pr92398.h */
+#include "pr92398.h"
diff --git a/gcc/testsuite/gcc.target/powerpc/pr92398.p9-.c b/gcc/testsuite/gcc.target/powerpc/pr92398.p9-.c
new file mode 100644
index 00000000000..065ae73f267
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/pr92398.p9-.c
@@ -0,0 +1,10 @@ 
+/* { dg-do compile { target { lp64 && {! p9+} } } } */
+/* { dg-require-effective-target powerpc_vsx_ok } */
+/* { dg-options "-O2 -mvsx" } */
+
+/* { dg-final { scan-assembler-times {\mnot\M} 2 { xfail be } } } */
+/* { dg-final { scan-assembler-times {\mstd\M} 2 { xfail { p8 && be } } } } */
+
+/* Source code for the test in pr92398.h */
+#include "pr92398.h"
+
diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp
index cda0f3d350b..ea9a50ccb27 100644
--- a/gcc/testsuite/lib/target-supports.exp
+++ b/gcc/testsuite/lib/target-supports.exp
@@ -2555,6 +2555,26 @@  proc check_effective_target_le { } {
     }]
 }
 
+# Return 1 if we're generating code for only power8 platforms.
+
+proc check_effective_target_p8 {  } {
+  return [check_no_compiler_messages_nocache p8 assembly {
+	#if !(!defined(_ARCH_PWR9) && defined(_ARCH_PWR8))
+	#error NO
+	#endif
+  } ""]
+}
+
+# Return 1 if we're generating code for power9 and future platforms.
+
+proc check_effective_target_p9+ {  } {
+  return [check_no_compiler_messages_nocache p9+ assembly {
+	#if !(defined(_ARCH_PWR9))
+	#error NO
+	#endif
+  } ""]
+}
+
 # Return 1 if we're generating 32-bit code using default options, 0
 # otherwise.