[2/4] riscv: Add 'break' statements to fpsetround switch

Message ID 20200121064637.1355843-2-keithp@keithp.com
State Accepted
Commit 8e74c7119fb7f95662bb4986570a98496f259400
Headers show
Series
  • [1/4] riscv: Use current pseudo-instructions to access the FCSR register
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Commit Message

Keith Packard Jan. 21, 2020, 6:46 a.m.
This makes the fpsetround function actually do something rather than
just return -1 due to the default 'fall-through' behavior of the switch
statement.

Signed-off-by: Keith Packard <keithp@keithp.com>

---
 newlib/libc/machine/riscv/ieeefp.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

-- 
2.25.0.rc1

Patch

diff --git a/newlib/libc/machine/riscv/ieeefp.c b/newlib/libc/machine/riscv/ieeefp.c
index 68ace0b09..c45832280 100644
--- a/newlib/libc/machine/riscv/ieeefp.c
+++ b/newlib/libc/machine/riscv/ieeefp.c
@@ -84,10 +84,10 @@  fpsetround(fp_rnd rnd_dir)
   unsigned new_rm;
   switch (rnd_dir)
     {
-    case FP_RN: new_rm = 0;
-    case FP_RZ: new_rm = 1;
-    case FP_RM: new_rm = 2;
-    case FP_RP: new_rm = 3;
+    case FP_RN: new_rm = 0; break;
+    case FP_RZ: new_rm = 1; break;
+    case FP_RM: new_rm = 2; break;
+    case FP_RP: new_rm = 3; break;
     default:    return -1;
     }
   fssr (new_rm << 5 | fsr & 0x1f);