[1/4] riscv: Use current pseudo-instructions to access the FCSR register

Message ID 20200121064637.1355843-1-keithp@keithp.com
State Accepted
Commit 954504ea1424069c7c8d34fe771a505df8b8e3e1
Headers show
Series
  • [1/4] riscv: Use current pseudo-instructions to access the FCSR register
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Commit Message

Keith Packard Jan. 21, 2020, 6:46 a.m.
Use fscsr and frcsr to store and read the FCSR register instead of
fssr and frsr.

Signed-off-by: Keith Packard <keithp@keithp.com>

---
 newlib/libc/machine/riscv/ieeefp.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

-- 
2.25.0.rc1

Comments

Keith Packard Jan. 21, 2020, 10:02 p.m. | #1
Corinna Vinschen <vinschen@redhat.com> writes:

> Keith, a --cover-letter for patch series would be nice, if only

> to allow patchset-wide discussions to appear in a neutral place :)


Oops! So sorry I didn't send one along. I'll add that to my patch
submission process notes so I don't forget in the future.

-- 
-keith

Patch

diff --git a/newlib/libc/machine/riscv/ieeefp.c b/newlib/libc/machine/riscv/ieeefp.c
index 9094cc651..68ace0b09 100644
--- a/newlib/libc/machine/riscv/ieeefp.c
+++ b/newlib/libc/machine/riscv/ieeefp.c
@@ -15,14 +15,14 @@ 
 static void
 fssr(unsigned value)
 {
-  asm volatile ("fssr %0" :: "r"(value));
+  asm volatile ("fscsr %0" :: "r"(value));
 }
 
 static unsigned
 frsr()
 {
   unsigned value;
-  asm volatile ("frsr %0" : "=r" (value));
+  asm volatile ("frcsr %0" : "=r" (value));
   return value;
 }