PR92090: Fix testcase failures by r276469

Message ID 20191030070244.127375-1-luoxhu@linux.ibm.com
State New
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Series
  • PR92090: Fix testcase failures by r276469
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Commit Message

luoxhu Oct. 30, 2019, 7:02 a.m.
-finline-functions is enabled by default for O2 since r276469, update the
test cases that inline small functions caused instruction number difference.

gcc/testsuite/ChangeLog:

	2019-10-30  Xiong Hu Luo  <luoxhu@linux.ibm.com>

	PR92090
	* gcc/testsuite/gcc.target/powerpc/pr79439-1.c: Update
	instruction counts.
	* gcc/testsuite/gcc.target/powerpc/vsx-builtin-7.c: Likewise.
---
 gcc/testsuite/gcc.target/powerpc/pr79439-1.c     | 6 +++---
 gcc/testsuite/gcc.target/powerpc/vsx-builtin-7.c | 2 +-
 2 files changed, 4 insertions(+), 4 deletions(-)

-- 
2.17.1

Comments

Segher Boessenkool Oct. 30, 2019, 10:27 p.m. | #1
Hi!

On Wed, Oct 30, 2019 at 02:02:44AM -0500, Xiong Hu Luo wrote:
> -finline-functions is enabled by default for O2 since r276469, update the

> test cases that inline small functions caused instruction number difference.


> --- a/gcc/testsuite/gcc.target/powerpc/pr79439-1.c

> +++ b/gcc/testsuite/gcc.target/powerpc/pr79439-1.c

> @@ -22,7 +22,7 @@ rec (int a)

>    return a + ret;

>  }

>  

> -/* { dg-final { scan-assembler-times {\mbl f\M}   1 } } */

> -/* { dg-final { scan-assembler-times {\mbl g\M}   1 } } */

> +/* { dg-final { scan-assembler-times {\mbl f\M}   2 } } */

> +/* { dg-final { scan-assembler-times {\mbl g\M}   2 } } */

>  /* { dg-final { scan-assembler-times {\mbl rec\M} 1 } } */

> -/* { dg-final { scan-assembler-times {\mnop\M}    2 } } */

> +/* { dg-final { scan-assembler-times {\mnop\M}    4 } } */


It's probably better to disable inlining for this one.

> diff --git a/gcc/testsuite/gcc.target/powerpc/vsx-builtin-7.c b/gcc/testsuite/gcc.target/powerpc/vsx-builtin-7.c

> index 5d31309f272..66b526832eb 100644

> --- a/gcc/testsuite/gcc.target/powerpc/vsx-builtin-7.c

> +++ b/gcc/testsuite/gcc.target/powerpc/vsx-builtin-7.c

> @@ -192,7 +192,7 @@ vector unsigned __int128 splat_uint128 (unsigned __int128 x) { return vec_splats

>  

>  /* { dg-final { scan-assembler-times {\mrldic\M} 0  { target { be && ilp32 } } } } */

>  /* { dg-final { scan-assembler-times {\mrldic\M} 64 { target { be && lp64 } } } } */

> -/* { dg-final { scan-assembler-times {\mrldic\M} 64 { target le } } } */

> +/* { dg-final { scan-assembler-times {\mrldic\M} 65 { target le } } } */

>  /* { dg-final { scan-assembler-times "xxpermdi" 4 { target be } } } */

>  /* { dg-final { scan-assembler-times "xxpermdi" 6 { target le } } } */

>  /* { dg-final { scan-assembler-times "vspltisb" 2 } } */


This one, too.

(Also needs testing on BE btw -- it's often fine if you don't, but only
fixing the tests for LE isn't great ;-) )


Segher

Patch

diff --git a/gcc/testsuite/gcc.target/powerpc/pr79439-1.c b/gcc/testsuite/gcc.target/powerpc/pr79439-1.c
index 5732a236c8e..ede1b493dbd 100644
--- a/gcc/testsuite/gcc.target/powerpc/pr79439-1.c
+++ b/gcc/testsuite/gcc.target/powerpc/pr79439-1.c
@@ -22,7 +22,7 @@  rec (int a)
   return a + ret;
 }
 
-/* { dg-final { scan-assembler-times {\mbl f\M}   1 } } */
-/* { dg-final { scan-assembler-times {\mbl g\M}   1 } } */
+/* { dg-final { scan-assembler-times {\mbl f\M}   2 } } */
+/* { dg-final { scan-assembler-times {\mbl g\M}   2 } } */
 /* { dg-final { scan-assembler-times {\mbl rec\M} 1 } } */
-/* { dg-final { scan-assembler-times {\mnop\M}    2 } } */
+/* { dg-final { scan-assembler-times {\mnop\M}    4 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/vsx-builtin-7.c b/gcc/testsuite/gcc.target/powerpc/vsx-builtin-7.c
index 5d31309f272..66b526832eb 100644
--- a/gcc/testsuite/gcc.target/powerpc/vsx-builtin-7.c
+++ b/gcc/testsuite/gcc.target/powerpc/vsx-builtin-7.c
@@ -192,7 +192,7 @@  vector unsigned __int128 splat_uint128 (unsigned __int128 x) { return vec_splats
 
 /* { dg-final { scan-assembler-times {\mrldic\M} 0  { target { be && ilp32 } } } } */
 /* { dg-final { scan-assembler-times {\mrldic\M} 64 { target { be && lp64 } } } } */
-/* { dg-final { scan-assembler-times {\mrldic\M} 64 { target le } } } */
+/* { dg-final { scan-assembler-times {\mrldic\M} 65 { target le } } } */
 /* { dg-final { scan-assembler-times "xxpermdi" 4 { target be } } } */
 /* { dg-final { scan-assembler-times "xxpermdi" 6 { target le } } } */
 /* { dg-final { scan-assembler-times "vspltisb" 2 } } */