[AArch64/Arm] Update testcases fixing endiannes and linux targets

Message ID 20190326132848.GA2489@arm.com
State New
Headers show
Series
  • [AArch64/Arm] Update testcases fixing endiannes and linux targets
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Commit Message

Tamar Christina March 26, 2019, 1:28 p.m.
Hi All,

This fixes the testcases that are failing due to my recent patch.
It turns out that the start address across baremetal and linux builds
isn't entirely predictable without a linker script.  Since the address
themselves are not the important thing I am ignoring them now.

Secondly I was encoding data using .word using non 0 values, however
because .word is subjected to endiannes these non-zero values under
big-endian happen to fall into the encoding space of instructions which
changes the disassembly.  Using 0 fixes this problem and the purpose of
the test still holds, though objdump will dump ... for data only sections,
which is ok as the data/insn mixed sections will test the patch.

The ARM Attributes sections is not important and is ignored.

Cross-compiled and regtested on
  aarch64-none-linux-gnu, aarch64_be-none-elf, aarch64-none-elf
  armeb-none-elf, arm-none-elf

and no issues.

Ok for master? and for backport to binutils-2.32?

Thanks,
Tamar

binutils/ChangeLog:

2019-03-26  Tamar Christina  <tamar.christina@arm.com>

	* testsuite/binutils-all/aarch64/in-order-all.d: Update.
	* testsuite/binutils-all/aarch64/in-order.d: Likewise.
	* testsuite/binutils-all/aarch64/out-of-order-all.d: Likewise.
	* testsuite/binutils-all/aarch64/out-of-order.d: Likewise.
	* testsuite/binutils-all/aarch64/out-of-order.s: Likewise.
	* testsuite/binutils-all/arm/in-order-all.d: Likewise.
	* testsuite/binutils-all/arm/in-order.d: Likewise.
	* testsuite/binutils-all/arm/out-of-order-all.d: Likewise.
	* testsuite/binutils-all/arm/out-of-order.d: Likewise.
	* testsuite/binutils-all/arm/out-of-order.s: Likewise.

--

Comments

Nick Clifton March 26, 2019, 3:43 p.m. | #1
Hi Tamar,

> It turns out that the start address across baremetal and linux builds

> isn't entirely predictable without a linker script. 


Do you know about the --entry=<address> linker command line option ?


> Ok for master? and for backport to binutils-2.32?


Yes and yes.
 
> binutils/ChangeLog:

> 2019-03-26  Tamar Christina  <tamar.christina@arm.com>

> 

> 	* testsuite/binutils-all/aarch64/in-order-all.d: Update.

> 	* testsuite/binutils-all/aarch64/in-order.d: Likewise.

> 	* testsuite/binutils-all/aarch64/out-of-order-all.d: Likewise.

> 	* testsuite/binutils-all/aarch64/out-of-order.d: Likewise.

> 	* testsuite/binutils-all/aarch64/out-of-order.s: Likewise.

> 	* testsuite/binutils-all/arm/in-order-all.d: Likewise.

> 	* testsuite/binutils-all/arm/in-order.d: Likewise.

> 	* testsuite/binutils-all/arm/out-of-order-all.d: Likewise.

> 	* testsuite/binutils-all/arm/out-of-order.d: Likewise.

> 	* testsuite/binutils-all/arm/out-of-order.s: Likewise.


Cheers
  Nick
Tamar Christina March 26, 2019, 4:05 p.m. | #2
Hi Nick,

> 

> Hi Tamar,

> 

> > It turns out that the start address across baremetal and linux builds

> > isn't entirely predictable without a linker script.

> 

> Do you know about the --entry=<address> linker command line option ?

> 


Yes, I was using it but specifying a symbol and setting the text-segment start,
-e v1 -Ttext-segment=0x400000. I wasn't aware that -e could also take an address!

Though the problem is I want v1 at 0x400000, and I can't seem to be able to guarantee
that with just the cmdline flags. It seems to be putting v1 at 0x4000b0 when using -linux-gnue
and I couldn't see why it's adding the extra 0xb0.. 

Cheers,
Tamar

> 

> > Ok for master? and for backport to binutils-2.32?

> 

> Yes and yes.

> 

> > binutils/ChangeLog:

> > 2019-03-26  Tamar Christina  <tamar.christina@arm.com>

> >

> > 	* testsuite/binutils-all/aarch64/in-order-all.d: Update.

> > 	* testsuite/binutils-all/aarch64/in-order.d: Likewise.

> > 	* testsuite/binutils-all/aarch64/out-of-order-all.d: Likewise.

> > 	* testsuite/binutils-all/aarch64/out-of-order.d: Likewise.

> > 	* testsuite/binutils-all/aarch64/out-of-order.s: Likewise.

> > 	* testsuite/binutils-all/arm/in-order-all.d: Likewise.

> > 	* testsuite/binutils-all/arm/in-order.d: Likewise.

> > 	* testsuite/binutils-all/arm/out-of-order-all.d: Likewise.

> > 	* testsuite/binutils-all/arm/out-of-order.d: Likewise.

> > 	* testsuite/binutils-all/arm/out-of-order.s: Likewise.

> 

> Cheers

>   Nick

>

Patch

diff --git a/binutils/testsuite/binutils-all/aarch64/in-order-all.d b/binutils/testsuite/binutils-all/aarch64/in-order-all.d
index 32f501b7d460b8a07954ee3680f26725542224e7..a484ca7d1783d8d4af061b9cbb1d94e43db935db 100644
--- a/binutils/testsuite/binutils-all/aarch64/in-order-all.d
+++ b/binutils/testsuite/binutils-all/aarch64/in-order-all.d
@@ -8,36 +8,31 @@ 
 
 Disassembly of section \.func1:
 
-0000000000400000 <v1>:
-  400000:	8b010000 	add	x0, x0, x1
-  400004:	00000000 	\.inst	0x00000000 ; undefined
+.+ <v1>:
+[^:]+:	8b010000 	add	x0, x0, x1
+[^:]+:	00000000 	\.inst	0x00000000 ; undefined
 
 Disassembly of section \.func2:
 
-0000000000400008 <\.func2>:
-  400008:	8b010000 	add	x0, x0, x1
+.+ <\.func2>:
+[^:]+:	8b010000 	add	x0, x0, x1
 
 Disassembly of section \.func3:
 
-000000000040000c <\.func3>:
-  40000c:	8b010000 	add	x0, x0, x1
-  400010:	8b010000 	add	x0, x0, x1
-  400014:	8b010000 	add	x0, x0, x1
-  400018:	8b010000 	add	x0, x0, x1
-  40001c:	8b010000 	add	x0, x0, x1
-  400020:	00000000 	\.inst	0x00000000 ; undefined
+.+ <\.func3>:
+[^:]+:	8b010000 	add	x0, x0, x1
+[^:]+:	8b010000 	add	x0, x0, x1
+[^:]+:	8b010000 	add	x0, x0, x1
+[^:]+:	8b010000 	add	x0, x0, x1
+[^:]+:	8b010000 	add	x0, x0, x1
+[^:]+:	00000000 	\.inst	0x00000000 ; undefined
 
 Disassembly of section \.rodata:
 
-0000000000400024 <\.rodata>:
-  400024:	00000004 	\.inst	0x00000004 ; undefined
+.+ <\.rodata>:
+[^:]+:	00000000 	\.inst	0x00000000 ; undefined
 
 Disassembly of section .global:
 
-0000000000410028 <__data_start>:
-  410028:	00000001 	\.inst	0x00000001 ; undefined
-  41002c:	00000000 	\.inst	0x00000000 ; undefined
-  410030:	00000001 	\.inst	0x00000001 ; undefined
-  410034:	00000000 	\.inst	0x00000000 ; undefined
-  410038:	00000001 	\.inst	0x00000001 ; undefined
-  41003c:	00000000 	\.inst	0x00000000 ; undefined
+.+ <.+>:
+	...
diff --git a/binutils/testsuite/binutils-all/aarch64/in-order.d b/binutils/testsuite/binutils-all/aarch64/in-order.d
index 090337f141db270172580b279d7a8e7c2be52913..1c0532e1278a7df5f99024ca082c2883e5daf4f4 100644
--- a/binutils/testsuite/binutils-all/aarch64/in-order.d
+++ b/binutils/testsuite/binutils-all/aarch64/in-order.d
@@ -8,21 +8,21 @@ 
 
 Disassembly of section \.func1:
 
-0000000000400000 <v1>:
-  400000:	8b010000 	add	x0, x0, x1
-  400004:	00000000 	\.word	0x00000000
+.+ <v1>:
+[^:]+:	8b010000 	add	x0, x0, x1
+[^:]+:	00000000 	\.word	0x00000000
 
 Disassembly of section .func2:
 
-0000000000400008 <\.func2>:
-  400008:	8b010000 	add	x0, x0, x1
+.+ <\.func2>:
+[^:]+:	8b010000 	add	x0, x0, x1
 
 Disassembly of section \.func3:
 
-000000000040000c <\.func3>:
-  40000c:	8b010000 	add	x0, x0, x1
-  400010:	8b010000 	add	x0, x0, x1
-  400014:	8b010000 	add	x0, x0, x1
-  400018:	8b010000 	add	x0, x0, x1
-  40001c:	8b010000 	add	x0, x0, x1
-  400020:	00000000 	\.word	0x00000000
+.+ <\.func3>:
+[^:]+:	8b010000 	add	x0, x0, x1
+[^:]+:	8b010000 	add	x0, x0, x1
+[^:]+:	8b010000 	add	x0, x0, x1
+[^:]+:	8b010000 	add	x0, x0, x1
+[^:]+:	8b010000 	add	x0, x0, x1
+[^:]+:	00000000 	\.word	0x00000000
diff --git a/binutils/testsuite/binutils-all/aarch64/out-of-order-all.d b/binutils/testsuite/binutils-all/aarch64/out-of-order-all.d
index 3020deff9c92c2c0e1cdcf17696d15f507e94485..d3aa79e48278f7aed2cf7efb18e0b90892d081e3 100644
--- a/binutils/testsuite/binutils-all/aarch64/out-of-order-all.d
+++ b/binutils/testsuite/binutils-all/aarch64/out-of-order-all.d
@@ -8,36 +8,31 @@ 
 
 Disassembly of section \.global:
 
-00000000ffe00000 <\.global>:
-    ffe00000:	00000001 	\.inst	0x00000001 ; undefined
-    ffe00004:	00000000 	\.inst	0x00000000 ; undefined
-    ffe00008:	00000001 	\.inst	0x00000001 ; undefined
-    ffe0000c:	00000000 	\.inst	0x00000000 ; undefined
-    ffe00010:	00000001 	\.inst	0x00000001 ; undefined
-    ffe00014:	00000000 	\.inst	0x00000000 ; undefined
+.+ <\.global>:
+	...
 
 Disassembly of section \.func2:
 
-0000000004018280 <\.func2>:
- 4018280:	8b010000 	add	x0, x0, x1
+.+ <\.func2>:
+[^:]+:	8b010000 	add	x0, x0, x1
 
 Disassembly of section \.func1:
 
-0000000004005000 <v1>:
- 4005000:	8b010000 	add	x0, x0, x1
- 4005004:	00000000 	\.inst	0x00000000 ; undefined
+.+ <v1>:
+[^:]+:	8b010000 	add	x0, x0, x1
+[^:]+:	00000000 	\.inst	0x00000000 ; undefined
 
 Disassembly of section \.func3:
 
-0000000004015000 <\.func3>:
- 4015000:	8b010000 	add	x0, x0, x1
- 4015004:	8b010000 	add	x0, x0, x1
- 4015008:	8b010000 	add	x0, x0, x1
- 401500c:	8b010000 	add	x0, x0, x1
- 4015010:	8b010000 	add	x0, x0, x1
- 4015014:	00000000 	\.inst	0x00000000 ; undefined
+.+ <\.func3>:
+[^:]+:	8b010000 	add	x0, x0, x1
+[^:]+:	8b010000 	add	x0, x0, x1
+[^:]+:	8b010000 	add	x0, x0, x1
+[^:]+:	8b010000 	add	x0, x0, x1
+[^:]+:	8b010000 	add	x0, x0, x1
+[^:]+:	00000000 	\.inst	0x00000000 ; undefined
 
 Disassembly of section \.rodata:
 
-0000000004015018 <\.rodata>:
- 4015018:	00000004 	\.inst	0x00000004 ; undefined
+.+ <\.rodata>:
+[^:]+:	00000000 	\.inst	0x00000000 ; undefined
diff --git a/binutils/testsuite/binutils-all/aarch64/out-of-order.d b/binutils/testsuite/binutils-all/aarch64/out-of-order.d
index 410f37f68ea21f9e16e2319b5048c123cec99910..a807b71fa36814e00cbb138d6befd88621ff4ba9 100644
--- a/binutils/testsuite/binutils-all/aarch64/out-of-order.d
+++ b/binutils/testsuite/binutils-all/aarch64/out-of-order.d
@@ -7,21 +7,21 @@ 
 
 Disassembly of section \.func2:
 
-0000000004018280 <\.func2>:
- 4018280:	8b010000 	add	x0, x0, x1
+.+ <\.func2>:
+[^:]+:	8b010000 	add	x0, x0, x1
 
 Disassembly of section \.func1:
 
-0000000004005000 <v1>:
- 4005000:	8b010000 	add	x0, x0, x1
- 4005004:	00000000 	\.word	0x00000000
+.+ <v1>:
+[^:]+:	8b010000 	add	x0, x0, x1
+[^:]+:	00000000 	\.word	0x00000000
 
 Disassembly of section \.func3:
 
-0000000004015000 <\.func3>:
- 4015000:	8b010000 	add	x0, x0, x1
- 4015004:	8b010000 	add	x0, x0, x1
- 4015008:	8b010000 	add	x0, x0, x1
- 401500c:	8b010000 	add	x0, x0, x1
- 4015010:	8b010000 	add	x0, x0, x1
- 4015014:	00000000 	\.word	0x00000000
+.+ <\.func3>:
+[^:]+:	8b010000 	add	x0, x0, x1
+[^:]+:	8b010000 	add	x0, x0, x1
+[^:]+:	8b010000 	add	x0, x0, x1
+[^:]+:	8b010000 	add	x0, x0, x1
+[^:]+:	8b010000 	add	x0, x0, x1
+[^:]+:	00000000 	\.word	0x00000000
diff --git a/binutils/testsuite/binutils-all/aarch64/out-of-order.s b/binutils/testsuite/binutils-all/aarch64/out-of-order.s
index 6c52e857df485f71ca650338ead40ee387459e87..51e66d7d1ce19898139c0b818a3ec83c0cf035c3 100644
--- a/binutils/testsuite/binutils-all/aarch64/out-of-order.s
+++ b/binutils/testsuite/binutils-all/aarch64/out-of-order.s
@@ -20,9 +20,9 @@  v1:
 
 	.data
 	.section .global,"aw",@progbits
-	.xword 1
-	.xword 1
-	.xword 1
+	.xword 0
+	.xword 0
+	.xword 0
 
 	.section .rodata
-	.word 4
+	.word 0
diff --git a/binutils/testsuite/binutils-all/arm/in-order-all.d b/binutils/testsuite/binutils-all/arm/in-order-all.d
index 3a098dd795a6f3853079bcfff31c824d7fe44155..5e51ca187a997b69ac074bda1311c469d1daafe0 100644
--- a/binutils/testsuite/binutils-all/arm/in-order-all.d
+++ b/binutils/testsuite/binutils-all/arm/in-order-all.d
@@ -8,43 +8,41 @@ 
 
 Disassembly of section \.func1:
 
-00400000 <v1>:
-  400000:	e0800001 	add	r0, r0, r1
-  400004:	00000000 	andeq	r0, r0, r0
+.+ <v1>:
+[^:]+:	e0800001 	add	r0, r0, r1
+[^:]+:	00000000 	andeq	r0, r0, r0
 
 Disassembly of section \.func2:
 
-00400008 <\.func2>:
-  400008:	e0800001 	add	r0, r0, r1
+.+ <\.func2>:
+[^:]+:	e0800001 	add	r0, r0, r1
 
 Disassembly of section \.func3:
 
-0040000c <\.func3>:
-  40000c:	e0800001 	add	r0, r0, r1
-  400010:	e0800001 	add	r0, r0, r1
-  400014:	e0800001 	add	r0, r0, r1
-  400018:	e0800001 	add	r0, r0, r1
-  40001c:	e0800001 	add	r0, r0, r1
-  400020:	00000000 	andeq	r0, r0, r0
+.+ <\.func3>:
+[^:]+:	e0800001 	add	r0, r0, r1
+[^:]+:	e0800001 	add	r0, r0, r1
+[^:]+:	e0800001 	add	r0, r0, r1
+[^:]+:	e0800001 	add	r0, r0, r1
+[^:]+:	e0800001 	add	r0, r0, r1
+[^:]+:	00000000 	andeq	r0, r0, r0
 
 Disassembly of section \.rodata:
 
-00400024 <\.rodata>:
-  400024:	00000004 	andeq	r0, r0, r4
+.+ <\.rodata>:
+[^:]+:	00000000 	andeq	r0, r0, r0
 
 Disassembly of section \.global:
 
-00410028 <__data_start>:
-  410028:	00000001 	andeq	r0, r0, r1
-  41002c:	00000001 	andeq	r0, r0, r1
-  410030:	00000001 	andeq	r0, r0, r1
+.+ <.+>:
+	...
 
 Disassembly of section \.ARM\.attributes:
 
-00000000 <\.ARM\.attributes>:
-   0:	00001141 	andeq	r1, r0, r1, asr #2
-   4:	61656100 	cmnvs	r5, r0, lsl #2
-   8:	01006962 	tsteq	r0, r2, ror #18
-   c:	00000007 	andeq	r0, r0, r7
-  10:	Address 0x0000000000000010 is out of bounds.
+.+ <\.ARM\.attributes>:
+[^:]+:	.+
+[^:]+:	.+
+[^:]+:	.+
+[^:]+:	.+
+[^:]+:	.+
 
diff --git a/binutils/testsuite/binutils-all/arm/in-order.d b/binutils/testsuite/binutils-all/arm/in-order.d
index a0b63c2462346ee982f58970fad1140041bdfc32..a2c9b9ed9b13cb7e90b23b4aef8f8a20486b9a3c 100644
--- a/binutils/testsuite/binutils-all/arm/in-order.d
+++ b/binutils/testsuite/binutils-all/arm/in-order.d
@@ -8,21 +8,21 @@ 
 
 Disassembly of section \.func1:
 
-00400000 <v1>:
-  400000:	e0800001 	add	r0, r0, r1
-  400004:	00000000 	\.word	0x00000000
+.+ <v1>:
+[^:]+:	e0800001 	add	r0, r0, r1
+[^:]+:	00000000 	\.word	0x00000000
 
 Disassembly of section \.func2:
 
-00400008 <\.func2>:
-  400008:	e0800001 	add	r0, r0, r1
+.+ <\.func2>:
+[^:]+:	e0800001 	add	r0, r0, r1
 
 Disassembly of section \.func3:
 
-0040000c <\.func3>:
-  40000c:	e0800001 	add	r0, r0, r1
-  400010:	e0800001 	add	r0, r0, r1
-  400014:	e0800001 	add	r0, r0, r1
-  400018:	e0800001 	add	r0, r0, r1
-  40001c:	e0800001 	add	r0, r0, r1
-  400020:	00000000 	\.word	0x00000000
+.+ <\.func3>:
+[^:]+:	e0800001 	add	r0, r0, r1
+[^:]+:	e0800001 	add	r0, r0, r1
+[^:]+:	e0800001 	add	r0, r0, r1
+[^:]+:	e0800001 	add	r0, r0, r1
+[^:]+:	e0800001 	add	r0, r0, r1
+[^:]+:	00000000 	\.word	0x00000000
diff --git a/binutils/testsuite/binutils-all/arm/out-of-order-all.d b/binutils/testsuite/binutils-all/arm/out-of-order-all.d
index 58c4057330dfffccb8b43f3119d26cd59b088f08..c1df00345560366503fd64d9e78a7fa37102b31c 100644
--- a/binutils/testsuite/binutils-all/arm/out-of-order-all.d
+++ b/binutils/testsuite/binutils-all/arm/out-of-order-all.d
@@ -8,43 +8,41 @@ 
 
 Disassembly of section \.global:
 
-ffe00000 <\.global>:
-ffe00000:	00000001 	andeq	r0, r0, r1
-ffe00004:	00000001 	andeq	r0, r0, r1
-ffe00008:	00000001 	andeq	r0, r0, r1
+.+ <\.global>:
+	...
 
 Disassembly of section \.func2:
 
-04018280 <\.func2>:
- 4018280:	e0800001 	add	r0, r0, r1
+.+ <\.func2>:
+[^:]+:	e0800001 	add	r0, r0, r1
 
 Disassembly of section \.func1:
 
-04005000 <v1>:
- 4005000:	e0800001 	add	r0, r0, r1
- 4005004:	00000000 	andeq	r0, r0, r0
+.+ <v1>:
+[^:]+:	e0800001 	add	r0, r0, r1
+[^:]+:	00000000 	andeq	r0, r0, r0
 
 Disassembly of section \.func3:
 
-04015000 <\.func3>:
- 4015000:	e0800001 	add	r0, r0, r1
- 4015004:	e0800001 	add	r0, r0, r1
- 4015008:	e0800001 	add	r0, r0, r1
- 401500c:	e0800001 	add	r0, r0, r1
- 4015010:	e0800001 	add	r0, r0, r1
- 4015014:	00000000 	andeq	r0, r0, r0
+.+ <\.func3>:
+[^:]+:	e0800001 	add	r0, r0, r1
+[^:]+:	e0800001 	add	r0, r0, r1
+[^:]+:	e0800001 	add	r0, r0, r1
+[^:]+:	e0800001 	add	r0, r0, r1
+[^:]+:	e0800001 	add	r0, r0, r1
+[^:]+:	00000000 	andeq	r0, r0, r0
 
 Disassembly of section \.rodata:
 
-04015018 <\.rodata>:
- 4015018:	00000004 	andeq	r0, r0, r4
+.+ <\.rodata>:
+[^:]+:	00000000 	andeq	r0, r0, r0
 
 Disassembly of section \.ARM\.attributes:
 
-00000000 <\.ARM\.attributes>:
-   0:	00001141 	andeq	r1, r0, r1, asr #2
-   4:	61656100 	cmnvs	r5, r0, lsl #2
-   8:	01006962 	tsteq	r0, r2, ror #18
-   c:	00000007 	andeq	r0, r0, r7
-  10:	Address 0x0000000000000010 is out of bounds.
+.+ <\.ARM\.attributes>:
+[^:]+:	.+
+[^:]+:	.+
+[^:]+:	.+
+[^:]+:	.+
+[^:]+:	.+
 
diff --git a/binutils/testsuite/binutils-all/arm/out-of-order.d b/binutils/testsuite/binutils-all/arm/out-of-order.d
index 9351af7987bb5fda58424c4212d3f2f4e57083de..f880cbcb91da49246fb47aa0d1acc52a314dcf61 100644
--- a/binutils/testsuite/binutils-all/arm/out-of-order.d
+++ b/binutils/testsuite/binutils-all/arm/out-of-order.d
@@ -7,21 +7,21 @@ 
 
 Disassembly of section \.func2:
 
-04018280 <\.func2>:
- 4018280:	e0800001 	add	r0, r0, r1
+.+ <\.func2>:
+[^:]+:	e0800001 	add	r0, r0, r1
 
 Disassembly of section \.func1:
 
-04005000 <v1>:
- 4005000:	e0800001 	add	r0, r0, r1
- 4005004:	00000000 	\.word	0x00000000
+.+ <v1>:
+[^:]+:	e0800001 	add	r0, r0, r1
+[^:]+:	00000000 	\.word	0x00000000
 
 Disassembly of section \.func3:
 
-04015000 <\.func3>:
- 4015000:	e0800001 	add	r0, r0, r1
- 4015004:	e0800001 	add	r0, r0, r1
- 4015008:	e0800001 	add	r0, r0, r1
- 401500c:	e0800001 	add	r0, r0, r1
- 4015010:	e0800001 	add	r0, r0, r1
- 4015014:	00000000 	\.word	0x00000000
+.+ <\.func3>:
+[^:]+:	e0800001 	add	r0, r0, r1
+[^:]+:	e0800001 	add	r0, r0, r1
+[^:]+:	e0800001 	add	r0, r0, r1
+[^:]+:	e0800001 	add	r0, r0, r1
+[^:]+:	e0800001 	add	r0, r0, r1
+[^:]+:	00000000 	\.word	0x00000000
diff --git a/binutils/testsuite/binutils-all/arm/out-of-order.s b/binutils/testsuite/binutils-all/arm/out-of-order.s
index 4e43ddf5587394a0f46fe2856a7064154a769799..3994fe524917bae3d50613fea3a2cb42bef9eb59 100644
--- a/binutils/testsuite/binutils-all/arm/out-of-order.s
+++ b/binutils/testsuite/binutils-all/arm/out-of-order.s
@@ -21,9 +21,9 @@  v1:
 
 	.data
 	.section .global,"aw",%progbits
-	.word 1
-	.word 1
-	.word 1
+	.word 0
+	.word 0
+	.word 0
 
 	.section .rodata
-	.word 4
+	.word 0